Working of successive approximation A/D converter -
1. With the arrival of the start command, the SAR sets the MSB d1= with all other bits to zero so that the trial code is 10000000.
2. The output Vd of the DAC is now compared with analog input va. If Va is greater than the DAC output Vd then 10000000 is less than the correct digital representation.
3. The MSB is left at '1' and the next lower significant bit is made '1' and further tested.
4. However, if Va is less than the DAC output, then 10000000 is greater than the correct digital representation.
5. So reset MSB to '0' and go on to next lower significant bit. This procedure is repeated for all subsequent bits, one at a rime, until all bit positions have been tested.
6. Whenever the DAC output crosses VA, the comparator changes State and this can be taken as the end of conversion (EOC) command.
