Systolic array: Difference between revisions

Revision as of 15:32, 19 July 2022

Revision as of 00:48, 2 February 2023

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A major benefit of systolic arrays is that all operand data and partial results are stored within (passing through) the processor array. There is no need to access external buses, main memory or internal caches during each operation as is the case with Von Neumann or [[Harvard architecture|Harvard]] sequential machines. The sequential limits on [[parallel computing|parallel]] performance dictated by [[Amdahl's Law]] also do not apply in the same way, because data dependencies are implicitly handled by the programmable [[Node (computer science)|node]] interconnect and there are no sequential steps in managing the highly parallel data flow.

Systolic arrays are therefore extremely good at artificial intelligence, image processing, pattern recognition, computer vision and other tasks whichthat animal brains do so particularly well. Wavefront processors in general can also be very good at machine learning by implementing self configuring neural nets in hardware.

==Classification controversy==