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# Triple-level cell or TLC (3 bits per cell) or 3-Bit MLC
# Quad-level cell or QLC (4 bits per cell)
# Penta-level cell or PLC (5 bits per cell) – currently in development<ref>{{
Notice that this nomenclature can be misleading, since an "''n''-level cell" in fact uses 2<sup>''n''</sup> levels of charge to store ''n'' bits (see below).
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In February 2016, a study was published that showed little difference in practice between the reliability of SLC and MLC.<ref>{{Cite journal |title= Flash Reliability in Production: The Expected and the Unexpected |author= Bianca Schroeder and Arif Merchant |publisher= Usenix |journal= Conference on File and Storage Technologies |date= February 22, 2016 |isbn= 9781931971287 |url= https://www.usenix.org/conference/fast16/technical-sessions/presentation/schroeder |access-date= November 3, 2016 }}</ref>
A single-level cell (SLC) flash memory may have a lifetime of about 50,000 to 100,000 program/erase cycles.<ref>
A single-level cell represents a 1 when almost empty and a 0 when almost full. There is a region of uncertainty (a read margin) between the two possible states at which the data stored in the cell cannot be precisely read.<ref name="
== Multi-level cell ==
The primary benefit of MLC flash memory is its lower cost per unit of storage due to the higher data density, and memory-reading software can compensate for a larger [[bit error rate]].<ref>[http://www.micron.com/products/nand/mlc-webinar.aspx Micron's MLC NAND Flash Webinar]. {{webarchive|url=https://web.archive.org/web/20070722200149/http://www.micron.com/products/nand/mlc-webinar.aspx |date=2007-07-22 }}.</ref> The higher error rate necessitates an [[error-correcting code]] (ECC) that can correct multiple bit errors; for example, the [[SandForce]] SF-2500 flash controller can correct up to 55 bits per 512-byte sector with an unrecoverable read error rate of less than one sector per 10<sup>17</sup> bits read.<ref>
Read speeds can also be lower for MLC NAND than SLC due to the need to read the same data at a second threshold voltage to help resolve errors. TLC and QLC devices may need to read the same data up to 4 and 8 times respectively to obtain values that are correctable by ECC.<ref>{{cite journal |last1=Peleato |display-authors=etal |title=Adaptive Read Thresholds for NAND Flash |journal=IEEE Transactions on Communications |date=Sep 2015 |volume=63 |issue=9 |pages=3069–3081 |doi=10.1109/TCOMM.2015.2453413 |s2cid=14159361|arxiv=2202.05661 }}</ref>
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MLC flash may have a lifetime of about 1,000 to 10,000 program/erase cycles. This typically necessitates the use of a [[flash file system]], which is designed around the limitations of flash memory, such as using [[wear leveling]] to extend the useful lifetime of the flash device.
The [[Intel 8087]] used two-bits-per-cell technology for its [[microcode]] [[ROM]],<ref>{{Cite web |title=Two bits per transistor: high-density ROM in Intel's 8087 floating point chip |url=http://www.righto.com/2018/09/two-bits-per-transistor-high-density.html |access-date=2022-05-18}}</ref> and in 1980 was one of the first devices on the market to use multi-level ROM cells.<ref>"Four-state cell called density key" article by J. Robert Lineback. "Electronics" magazine. 1982 June 30.</ref><ref>{{Cite web |last=P. Glenn Gulak
MLC is used to refer to cells that store 2 bits per cell, using 4 charge values or levels. A 2-bit MLC has a single charge level assigned to every possible combination of ones and zeros, as follows: When close to 25% full, the cell represents a binary value of 11; when close to 50%, the cell represents a 01; when close to 75%, the cell represents a 00; and when close to 100%, the cell represents a 10. Once again, there is a region of uncertainty (read margin) between values, at which the data stored in the cell cannot be precisely read.<ref>{{cite web |url=https://www.enterprisestorageforum.com/storage-hardware/slc-vs-mlc-vs-tlc-nand-flash.html |author=Pedro Hernandez |title=SLC vs MLC vs TLC NAND Flash |website=Enterprise Storage Forum |date=June 29, 2018}}</ref><ref name="
{{As of|2013|post=,}} some [[solid-state drives]] use part of an MLC NAND die as if it were single-bit SLC NAND, giving higher write speeds.<ref>
{{As of|2018|post=,}} nearly all commercial MLCs are planar-based (i.e. cells are built on silicon surface) and so subject to scaling limitations. To address this potential problem, the industry is already looking at technologies that can guarantee storage density increases beyond today’s limitations. One of the most promising is 3D Flash, where cells are stacked vertically, thereby avoiding the limitations of planar scaling.<ref>
In the past, a few memory devices went the other direction and used two cells per bit to give even lower bit error rates.<ref>
Enterprise MLC (eMLC) is a more expensive variant of MLC that is optimized for commercial use. It claims to last longer and be more reliable than normal MLCs while providing cost savings over traditional SLC drives. Although many SSD manufacturers have produced MLC drives intended for enterprise use, only Micron sells raw NAND Flash chips under this designation.<ref>{{cite web |title=Enterprise MLC: Extended MLC Cycling Capabilities |url=https://www.micron.com/products/nand-flash/mlc-nand/enterprise-mlc |website=www.micron.com |access-date=17 November 2019 |language=en}}</ref>
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In 2009, Toshiba and [[SanDisk]] introduced [[NAND flash]] memory chips with quad-level cells, storing 4 bits per cell and holding a capacity of 64{{nbsp}}Gbit.<ref name="toshiba2009"/><ref>{{cite news |title=SanDisk ships world's first memory cards with 64 gigabit X4 NAND flash |url=https://www.slashgear.com/sandisk-ships-worlds-first-memory-cards-with-64-gigabit-x4-nand-flash-1360217/ |access-date=20 June 2019 |work=SlashGear |date=13 October 2009}}</ref>
SanDisk X4 flash memory cards, introduced in 2009, was one of the first products based on NAND memory that stores 4 bits per cell, commonly referred to as quad-level-cell (QLC), using 16 discrete charge levels (states) in each individual transistor. The QLC chips used in these memory cards were manufactured by Toshiba, SanDisk and [[SK Hynix]].<ref>
In 2017, Toshiba introduced V-NAND memory chips with quad-level cells, which have a storage capacity of up to 768{{nbsp}}Gbit.<ref>{{cite news |title=Toshiba Develops World's First 4-bit Per Cell QLC NAND Flash Memory |url=https://www.techpowerup.com/234729/toshiba-develops-worlds-first-4-bit-per-cell-qlc-nand-flash-memory |access-date=20 June 2019 |work=TechPowerUp |date=June 28, 2017}}</ref> In 2018, [[ADATA]], [[Intel]], [[Micron Technology|Micron]] and Samsung have launched some SSD products using QLC NAND memory.<ref>{{Cite web|url=https://www.anandtech.com/show/13606/adata-ultimate-su630-ssd-3d-qlc-for-sata|title=ADATA Reveals Ultimate SU630 SSD: 3D QLC for SATA|last=Shilov|first=Anton|website=AnandTech.com|access-date=2019-05-13}}</ref><ref>{{Cite web|url=https://www.anandtech.com/show/13078/the-intel-ssd-660p-ssd-review-qlc-nand-arrives|title=The Intel SSD 660p SSD Review: QLC NAND Arrives For Consumer SSDs|last=Tallis|first=Billy|website=www.anandtech.com|access-date=2019-05-13}}</ref><ref>{{Cite web|url=https://www.anandtech.com/show/13512/the-crucial-p1-1tb-ssd-review|title=The Crucial P1 1TB SSD Review: The Other Consumer QLC SSD|last=Tallis|first=Billy|website=www.anandtech.com|access-date=2019-05-13}}</ref><ref>{{Cite web|url=https://www.anandtech.com/show/13170/samsung-starts-mass-production-of-qlc-vnandbased-ssds|title=Samsung Starts Mass Production of QLC V-NAND-Based SSDs|last=Shilov|first=Anton|website=AnandTech.com|access-date=2019-05-13}}</ref>
In 2020, Samsung released a QLC SSD with storage space up to 8 TB for customers. It is the SATA SSD with the largest storage capacity for end customers as of 2020.<ref>{{
== See also ==
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