Memory hierarchy: Difference between revisions

Revision as of 16:05, 6 May 2022

Revision as of 01:05, 15 March 2023

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{{Memory types}}

In [[computer architectureorganisation]], the '''memory hierarchy''' separates [[computer storage]] into a hierarchy based on response time. Since response time, complexity, and capacity are related, the levels may also be distinguished by their performance and controlling technologies.<ref name="toyzee" /> Memory hierarchy affects performance in computer architectural design, algorithm predictions, and lower level [[computer programming|programming]] constructs involving [[locality of reference]].

Designing for high performance requires considering the restrictions of the memory hierarchy, i.e. the size and capabilities of each component. Each of the various components can be viewed as part of a hierarchy of memories (m₁, m₂, ..., m_n) in which each member m_i is typically smaller and faster than the next highest member m_i+1 of the hierarchy. To limit waiting by higher levels, a lower level will respond by filling a buffer and then signaling for activating the transfer.