Bit-reversal permutation: Difference between revisions

Revision as of 06:31, 17 March 2023

Revision as of 06:40, 17 March 2023

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| year = 2004}}.</ref>

The performance improvement of bit-reversals in both uniprocessor and multiprocessors has been paid a serious attention in high-performance computing fields. Because architecture-aware algorithm development can best utilize hardware and system software resources, including caches, TLB, and multicores, significantly accelerating the computation.<ref>{{citation
| last1 = Zhang |author first1 = Zhao
| Zhanglast2 and Xiaodong= Zhang | titlefirst2 ="Fast Bit-ReversalsXiaodong
| ondoi Uniprocessors= and10.1137/S1064827599359709
| Shared-Memoryissue Multiprocessors"= 6
|conference journal = SIAM Journal on Scientific Computing
| year=2001 |pagesmr = 2113-21341856305
| urlpages = https://upload.wikimedia.org/wikipedia/commons/3/3d/AST_BIT-REVERSALS.pdf }}</ref>2113–2134

| title = Fast bit-reversals on uniprocessors and shared-memory multiprocessors

| volume = 22

| year = 2000}}</ref>

==References==