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SimLibrarian (talk | contribs) m →CMOS battery: spelled out short integers (MOS:NUMERAL) |
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[[File:Casio fx-8000G - NEC D4364G-1821.jpg|thumb|NEC D4364G 8192 x 8 Bit Static CMOS RAM]]
[[Image:Bottom EPIA PX10000G Motherboard new.jpg|right|thumb|200px|CMOS battery in a [[Pico ITX]] motherboard]]
'''Nonvolatile BIOS memory''' refers to a small [[Memory (computers)|memory]] on [[personal computer|PC]] [[motherboard]]s that is used to store [[BIOS]] settings. It is traditionally called '''CMOS''' RAM because it uses a [[volatile memory|volatile]], low-power [[CMOS|complementary metal–oxide–semiconductor (CMOS)]] [[Static random access memory|SRAM]] (such as the [[Motorola]] MC146818 or similar) powered by a small "CMOS" battery when system and standby power is off.<ref name=whatiscmos>{{cite web |url=http://pcsupport.about.com/od/termsc/g/cmos.htm |title=What is CMOS? (CMOS & CMOS Battery Definition) |publisher=[[About.com]] |first=Tim |last=Fisher |access-date=2 September 2015 |archive-date=9 August 2016 |archive-url=https://web.archive.org/web/20160809082556/http://pcsupport.about.com/od/termsc/g/cmos.htm |url-status=dead }}</ref> It is referred to as non-volatile memory or [[Non-volatile random-access memory|NVRAM]] because, after the system loses power, it does retain state by virtue of the CMOS battery. The typical NVRAM capacity is 256 [[byte]]s.<ref name="100Series" />
The CMOS RAM and the real-time clock have been integrated as a part of the [[Southbridge (computing)|southbridge]] chipset and it may not be a standalone chip on modern motherboards.<ref name="100Series">{{cite web|url=http://www.intel.com/content/www/us/en/chipsets/100-series-chipset-datasheet-vol-1.html |title=Intel 100 Series Chipset Family PCH Datasheet| publisher=Intel |date=August 2015 |access-date=16 April 2016}}</ref><ref>{{cite web|url=https://www.intel.com/Assets/PDF/datasheet/290562.pdf|title=82430FX PCISET Data Sheet|publisher=Intel|access-date=23 January 2023}}</ref> In turn, the southbridge have been integrated into a single [[Platform Controller Hub]].
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