IBM System/360 architecture: Difference between revisions

Revision as of 15:18, 8 February 2023

Revision as of 08:29, 18 May 2023

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==Input/Output==

{{further|topic=physical interface|Bus and Tag}}

This article describes I/O from the CPU perspective. It does not discuss the channel cable or connectors, butwhich have a [[Bus and Tag|separate article]]; there is a summary [[IBM System/360#Channels|elsewhere]] and details can be found in the IBM literature.<ref name=A22-6843/> and in FIPS PUB 60-2.<ref>{{cite report

| title = I/O Channel Interface

| id = FIPS PUB 60-2

| date = July 29, 1983

| url = https://nvlpubs.nist.gov/nistpubs/Legacy/FIPS/fipspub60-2.pdf

| publisher = [[National Technical Information Service]]

| access-date = May 18, 2023

}}

</ref>

I/O is carried out by a conceptually separate processor called a channel. Channels have their own instruction set, and access memory independently of the program running on the CPU. On the smaller models (through [[IBM System/360 Model 50|360/50]]) a single microcode engine runs both the CPU program and the channel program. On the larger models the channels are in separate cabinets and have their own interfaces to memory. A channel may contain multiple '''subchannel'''s, each containing the status of an individual channel program. A subchannel associated with multiple devices that cannot concurrently have channel programs is referred to as '''shared'''; a subchannel representing a single device is referred to as '''unshared'''.