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== Many dubious and unsourced claims ==
This article is mostly personal opinion and original research, rather than information from reliable sources. For example, the article equates RISC with load-store architecture, which doesn't match published RISC definitions. This ahistorical definition then leads to strange conclusions such as the Intel 4004 is a CISC. While it would be nice to have an easy definition where combining arithmetic and memory access = CISC, that's not the case. I could be [[WP:BOLD]] and delete all the uncited statements, but there wouldn't be much left, so I'm encouraging people to cite reliable sources. [[User:KenShirriff|KenShirriff]] ([[User talk:KenShirriff|talk]]) 02:39, 24 June 2023 (UTC)
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