Field-programmable analog array: Difference between revisions

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Revision as of 12:05, 17 July 2023

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The '''reconfigurable analog signal processor''' ('''RASP''') and a second version were introduced in 2002 by Hall et al.<ref name="6 Hall">{{cite book|title=Field Programmable Analog Arrays: A Floating-Gate Approach|chapter=Field-Programmable Analog Arrays: A Floating—Gate Approach|series=Lecture Notes in Computer Science|year=2002|doi=10.1007/3-540-46117-5_45|s2cid=596774|last1=Hall|first1=Tyson S.|last2=Hasler|first2=Paul|last3=Anderson|first3=David V.|volume=2438|pages=424–433|hdl=1853/5071 |isbn=978-3-540-44108-3|url=http://uilis.unsyiah.ac.id/opentheses/items/show/3084}}</ref><ref name="7 Hall">{{cite journal|title=Large scale field programmable analog arrays for analog signal processing|doi=10.1109/TCSI.2005.853401|year=2005|last1=Hall|first1=T.S.|last2=Twigg|first2=C.M.|last3=Gray|first3=J.D.|last4=Hasler|first4=P.|last5=Anderson|first5=D.V.|journal=IEEE Transactions on Circuits and Systems I: Regular Papers|volume=52|issue=11|pages=2298–2307|s2cid=1148361}}</ref> Their design incorporated high-level elements such as second order [[Band-pass filter|bandpass filters]] and 4 by 4 vector matrix multipliers into the CABs. Because of its architecture, it is limited to around 100&nbsp;kHz and the chip itself is not able to support independent reconfiguration.

In 2004 Joachim Becker picked up the [[parallel connection]] of OTAs (operational transconductance amplifiers) and proposed its use in a hexagonal local interconnection architecture.<ref name="8 Becker">{{cite citeseerx |title=A continuous-time field programmable analog array (FPAA) consisting of digitally reconfigurable GM-cells |citeseerx = 10.1.1.444.8748}}{{clarify|reason={{!}} "title=" does not match title at citeseerx;|date=July 2023}}</ref> It did not require a routing network and eliminated switching the signal path that enhances the frequency response.

In 2005 Fabian Henrici worked with Joachim Becker to develop a switchable and invertible OTA which doubled the maximum FPAA bandwidth.<ref name="9 Becker">{{cite citeseerx |title=A Continuous-Time Hexagonal Field-Programmable Analog Array in 0.13 µm CMOS with 186MHz GBW|citeseerx = 10.1.1.444.8748}}{{clarify|reason={{!}} "title=" does not match title at citeseerx;|date=July 2023}}</ref> This collaboration resulted in the first manufactured FPAA in a [[130 nanometer|0.13&nbsp;µm]] [[CMOS]] technology.

In 2016 Dr. Jennifer Hasler from Georgia Tech designed a FPAA system on a chip that uses analog technology to achieve unprecedented power and size reductions.<ref name="11 Hasler">{{cite journal |date=June 2016 |author=Suma George |author2=Sihwan Kim |author3=Sahil Shah |author4=Jennifer Hasler |author5=Michelle Collins |author6=Farhan Adil |author7=Richard Wunderlich |author8=Stephen Nease |author9=Shubha Ramakrishnan |title=A Programmable and Configurable Mixed-Mode FPAA SoC |journal=IEEE Transactions on Very Large Scale Integration (VLSI) Systems |volume=24 |issue=6 |pages=2253-2261 |doi=10.1109/TVLSI.2015.2504119|s2cid=14027246}}</ref>