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The idea arose from the difficulty of programming the [[IBM SSEC]] machine when Backus was hired to calculate astronomical positions in early 1950.<ref name="Booch-Backus_2006"/>
The speedcoding system was an [[Interpreter (computing)|interpreter]] and focused on ease of use at the expense of system resources. It provided pseudo-instructions for common mathematical functions: logarithms, exponentiation, and trigonometric operations. The resident software analyzed pseudo-instructions one by one and called the appropriate subroutine. Speedcoding was also the first implementation of decimal input/output operations. Although it substantially reduced the effort of writing many jobs, the running time of a program that was written with the help of Speedcoding was usually ten to twenty times that of machine code.<ref name="Pugh-Johnson-Palmer_1991"/> The interpreter took 310 memory words, about 30% of the memory available on a 701.<ref name="Allen_1981"/>
==Syntax and Semantics==
Speedcoding programs are organized as a series of instructions, each of which are stored in memory as a single 72-bit data word. An instruction generally consists of two operations (OP<sub>1</sub> and OP<sub>2</sub>) and 4 memory addresses. The first operation (OP<sub>1</sub>) is a mathematical or input/output operation that has 3 associated memory addresses, one or more of which can be modified depending on the nature of the operation. Mathematical operations include basic arithmetic, square root, and trigonometry functions. The logical operations include functionality for reading, writing, skipping, and rewinding [[magnetic-tape data storage|magnetic tape]], as well as operations for interacting with data stored in [[drum memory]].The second operation (OP<sub>2</sub>) is a logical operation that has the remaining 1 associated memory address. Logical operations allow instructions to be carried out in a different order from which they are written allowing for implementations of gotos, conditionals, loops, and other advanced behavior.<ref name="ibm-speedcoding-system-1954"/>
Reserved Arithmetic and Input/Output Operation Keywords<ref name="ibm-speedcoding-system-1954"/>
{{columns-list
| colwidth=5em;
| {{bulleted list
|ADD
|SUB
|ADDAB
|ABADD
|SUBAB
|ABSUB
|MPY
|NGMPY
|DIV
|NGDIV
|SQRT
|SINE
|ARTAN
|EXP
|LN
|MOVE
|WRTPJ
|WRTPK
|WRTPL
|WRTPM
|RFTPJ
|RFTPL
|RFTPM
|RBTPJ
|RBTPK
|RBTPL
|RBTPM
|SFTPJ
|SFTPK
|SFTPL
|SFTPM
|SBTPJ
|SBTPK
|SBTPL
|SBTPM
|RWTPJ
|RWTPK
|RWTPL
|RWTPM
|EFTPJ
|EFTPK
|EFTPL
|EFTPM
|WRDRP
|WRDRQ
|RFDRP
|RFDRQ
|PRINT
|EJECT
|NOOP
}}
}}
Reserved Logical Keywords<ref name="ibm-speedcoding-system-1954"/>
{{columns-list
| colwidth=5em;
| {{bulleted list
|TR
|TRPL
|TRMN
|TRZ
|SNTRP
|SNTRQ
|TIA
|TIB
|TIC
|TIBC
|TIAC
|TIABC
|TDA
|TDC
|TDAB
|TDBC
|TDAC
|TDABC
|SETRA
|SETRB
|SETRC
|SKRA
|SKRB
|SKRC
|RADDA
|RADDB
|RADDC
|RADDD
|ADDA
|ADDB
|ADDC
|ADDD
|SUBA
|SUBB
|SUBC
|SUBD
|STA
|STB
|STC
|STD
|SKIP
|PRCH
|STCH
|ECHTR
}}
}}
==See also==
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<ref name="Booch-Backus_2006">{{cite web |title=Oral History of John Backus |author-first=John W. |author-last=Backus |author-link=John W. Backus |editor-first=Grady |editor-last=Booch |editor-link=Grady Booch |type=Interview |date=2006-09-05 |work=Reference number: X3715.2007 |publisher=[[Computer History Museum]] |___location=Ashland, Oregon, USA |url=http://archive.computerhistory.org/resources/text/Oral_History/Backus_John/Backus_John_1.oral_history.2006.102657970.pdf |access-date=2011-04-23 |url-status=live |archive-url=https://web.archive.org/web/20220408163653/http://archive.computerhistory.org/resources/text/Oral_History/Backus_John/Backus_John_1.oral_history.2006.102657970.pdf |archive-date=2022-04-08}} (42 pages)</ref>
<ref name="Pugh-Johnson-Palmer_1991">{{cite book |title=IBM's 360 and early 370 systems |author-first1=Emerson W. |author-last1=Pugh |author-first2=Lyle R. |author-last2=Johnson |author-first3=John H. |author-last3=Palmer |publisher=[[MIT Press]] |date=1991 |isbn=0-262-16123-0 |page=38}}</ref>
<ref name="ibm-speedcoding-system-1954">{{cite book |title=IBM speedcoding system for the type 701 electronic data processing machines |date=1954 |orig-date=1953-09-10 |publisher=[[International Business Machines Corporation]] |___location=New York, USA |id=Form 24-6059-0 (5-54:2M-W) |url=https://archive.computerhistory.org/resources/access/text/2018/02/102678975-05-01-acc.pdf |access-date=2022-07-04 |url-status=live |archive-url=https://web.archive.org/web/20220704164350/https://archive.computerhistory.org/resources/access/text/2018/02/102678975-05-01-acc.pdf |archive-date=2022-07-04}}</ref>
}}
== Further reading ==
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