Symmetric multiprocessing: Difference between revisions

Revision as of 13:07, 24 August 2023

Revision as of 12:02, 30 September 2023

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'''Symmetric multiprocessing''' or '''shared-memory multiprocessing'''<ref>{{cite book |last1=Patterson |first1=David |last2=Hennessy |first2=John |author-link1=David Patterson (computer scientist) |author-link2=John L. Hennessy |date=2018 |title=Computer Organisation and Design: The Hardware/Software Interface |___location=Cambridge, United States |publisher=Morgan Kaufmann |page=509 |isbn=978-0-12-812275-4|edition=RISC-V }}</ref> ('''SMP''') involves a [[multiprocessor]] computer hardware and software architecture where two or more identical processors are connected to a single, shared [[main memory]], have full access to all input and output devices, and are controlled by a single operating system instance that treats all processors equally, reserving none for special purposes. Most multiprocessor systems today use an SMP architecture. In the case of [[multi-core processor]]s, the SMP architecture applies to the cores, treating them as separate processors.

Professor John D. Kubiatowicz considers traditionally SMP systems to contain processors without caches.<ref>{{cite conference|url=https://parlab.eecs.berkeley.edu/2013bootcampagenda|conference=2013 Short Course on Parallel Programming|author=John Kubiatowicz|title=Introduction to Parallel Architectures and Pthreads}}</ref> Culler and Pal-Singh in their 1998 book "Parallel Computer Architecture: A Hardware/Software Approach" mention: "The term SMP is widely used but causes a bit of confusion. [...] The more precise description of what is intended by SMP is a shared memory multiprocessor where the cost of accessing a memory ___location is the same for all processors; that is, it has uniform access costs when the access actually is to memory. If the ___location is cached, the access will be faster, but cache access times and memory access times are the same on all processors."<ref>{{cite book|isbn={{Format ISBN|978-1558603431}}|author1=David Culler|author-link1=David Culler|author2=Jaswinder Pal Singh|author3=Anoop Gupta|title=Parallel Computer Architecture: A Hardware/Software Approach|url=https://books.google.com/books?id=MHfHC4Wf3K0C&pg=PA32|page=47|year=1999|publisher=[[Morgan Kaufmann]]}}</ref>

SMP systems are ''[[multiprocessing#Processor coupling|tightly coupled multiprocessor]] systems'' with a pool of homogeneous processors running independently of each other. Each processor, executing different programs and working on different sets of data, has the capability of sharing common resources (memory, I/O device, interrupt system and so on) that are connected using a [[system bus]] or a [[crossbar switch|crossbar]].

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Starting with its version 7.0 (1972), [[Digital Equipment Corporation]]'s operating system [[TOPS-10]] implemented the SMP feature, the earliest system running SMP was the [[PDP-10|DECSystem 1077]] dual KI10 processor system.<ref>[http://www.ultimate.com/phil/pdp10/10periphs DEC 1077 and SMP]</ref> Later KL10 system could aggregate up to 8 CPUs in a SMP manner. In contrast, DECs first multi-processor [[VAX]] system, the VAX-11/782, was asymmetric,<ref>[http://www.bitsavers.org/pdf/dec/vax/EG-21731-18_VAX_Product_Sales_Guide_Apr82.pdf VAX Product Sales Guide, pages 1-23 and 1-24]: the VAX-11/782 is described as an asymmetric multiprocessing system in 1982</ref> but later VAX multiprocessor systems were SMP.<ref>[http://www.bitsavers.org/pdf/dec/vax/8800/EK-8840H-UG-001_88xx_System_Hardware_Users_Guide_Mar88.pdf VAX 8820/8830/8840 System Hardware User's Guide]: by 1988 the VAX operating system was SMP</ref>

Early commercial Unix SMP implementations included the [[Sequent Computer Systems]] Balance 8000 (released in 1984) and Balance 21000 (released in 1986).<ref>{{Cite book |last1 = Hockney |first1 = R.W. |last2 = Jesshope |first2 = C.R. |title = Parallel Computers 2: Architecture, Programming and Algorithms |publisher = Taylor & Francis |year = 1988 | pagespage = 46 |isbn = 0-85274-811-6}}</ref> Both models were based on 10&nbsp;MHz [[National Semiconductor]] [[NS320xx|NS32032]] processors, each with a small write-through cache connected to a common memory to form a [[Shared memory architecture|shared memory]] system. Another early commercial Unix SMP implementation was the NUMA based Honeywell Information Systems Italy XPS-100 designed by Dan Gielan of VAST Corporation in 1985. Its design supported up to 14 processors, but due to electrical limitations, the largest marketed version was a dual processor system. The operating system was derived and ported by VAST Corporation from AT&T 3B20 Unix SysVr3 code used internally within AT&T.

Earlier non-commercial multiprocessing UNIX ports existed, including a port named MUNIX created at the [[Naval Postgraduate School]] by 1975.<ref>{{Cite web|url=https://core.ac.uk/download/pdf/36714194.pdf|title=MUNIX, A Multiprocessing Version Of UNIX|last=Hawley|first=John Alfred|date=June 1975|website=core.ac.uk|access-date=11 November 2018}}</ref>

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== References ==

{{Reflist|refs=

<ref name="AutoMQ-1">{{cite journal |title= Trends in Multi-core DSP Platforms |authorsauthor= Lina J. Karam, |author2=Ismail AlKamal, |author3=Alan Gatherer, |author4=Gene A. Frantz, |author5=David V. Anderson, |author6=Brian L. Evans |journal= IEEE Signal Processing Magazine|volume= 26 |issue= 6 |pages= 38–49 |year= 2009 |url= http://users.ece.utexas.edu/~bevans/papers/2009/multicore/MulticoreDSPsForIEEESPMFinal.pdf |bibcode= 2009ISPM...26...38K |doi= 10.1109/MSP.2009.934113 |s2cid= 9429714 }}</ref>

<ref name="AutoMQ-4">[http://www.nvidia.com/content/pdf/tegra_white_papers/tegra-whitepaper-0911b.pdf Variable SMP – A Multi-Core CPU Architecture for Low Power and High Performance. NVIDIA. 2011.]</ref>

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