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The bit cell is programmed by applying a high-voltage pulse not encountered during a normal operation across the gate and substrate of the thin oxide transistor (around 6{{nbsp}}V for a 2 nm thick oxide, or 30{{nbsp}}MV/cm) to break down the oxide between gate and substrate. The positive voltage on the transistor's gate forms an inversion channel in the substrate below the gate, causing a tunneling current to flow through the oxide. The current produces additional traps in the oxide, increasing the current through the oxide and ultimately melting the oxide and forming a conductive channel from gate to substrate. The current required to form the conductive channel is around 100{{nbsp}}µA/100{{nbsp}}nm{{sup|2}} and the breakdown occurs in approximately 100{{nbsp}}µs or less.<ref>{{cite web |url=http://www.sidense.com/images/stories/designcon_8_a_eval_embedded_nvm_65nm_and_beyond.pdf |title=Evaluating Embedded Non-Volatile Memory for 65nm and Beyond |author=Wlodek Kurjanowicz |year=2008 |access-date=2009-09-04 |url-status=dead |archive-url=https://web.archive.org/web/20160304025935/http://www.sidense.com/images/stories/designcon_8_a_eval_embedded_nvm_65nm_and_beyond.pdf |archive-date=2016-03-04 }}</ref>
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* [[Intel HEX]]
==References==
{{Reflist}}
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