Content deleted Content added
Guy Harris (talk | contribs) Avoid redirect. No need to link programmable interrupt controller twice (that page isn't about the 8259, it's about interrupt controllers in general - Intel 8259 is the page about the 8259). Remove items linked in the body from "See also". |
|||
Line 1:
{{Short description|Family of computer interrupt controllers}}
In [[computing]], [[Intel]]'s '''Advanced Programmable Interrupt Controller''' ('''APIC''') is a family of [[programmable interrupt controller]]s. As its name suggests, the APIC is more advanced than Intel's [[8259]]
The APIC is a split architecture design, with a local component (LAPIC) usually integrated into the processor itself, and an optional I/O APIC on a system bus. The first APIC was the 82489DX{{snd}} it was a discrete chip that functioned both as local and I/O APIC. The 82489DX enabled construction of [[symmetric multiprocessor]] (SMP) systems with the [[Intel 486]] and early [[Pentium]] processors; for example, the reference two-way 486 SMP system used three 82489DX chips, two as local APICs and one as I/O APIC. Starting with the [[P54C]] processor, the local APIC functionality was integrated into the Intel processors' silicon. The first dedicated I/O APIC was the Intel 82093AA, which was intended for [[PIIX3]]-based systems.
Line 59:
== See also ==
* [[Inter-processor interrupt]] (IPI)
* [[Interrupt]]
| |||