Intel 5-level paging: Difference between revisions

Revision as of 13:06, 14 November 2023

Revision as of 09:28, 19 November 2023

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== Implementation ==

5-level paging is implemented by the [[Ice Lake (microprocessor)|Ice Lake]] [[microarchitecture]],<ref name="anandtech-13699"/>, [[Epyc#Fourth_generation_Epyc_(Genoa,_Bergamo_and_Siena)|EPYC 9004 Series Processors]]<ref>{{Cite web|url=https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/tuning-guides/58020-epyc-9004-tg-high-perf-toolchain.pdf|title=Tuning Guide for AMD EPYC™ 9004 Processors|publisher=[[AMD]]|date=September 2023}}</ref> and [[List_of_AMD_Ryzen_processors#Storm_Peak_desktop|Storm peak]] [[Ryzen#Threadripper_series|Ryzen Threadripper]] PRO 7900WX series.<ref>{{Cite web|url=https://github.com/InstLatx64/InstLatx64/blob/37bd7b1ac29d95ddcf1fed90efaf7e82c89ab65d/AuthenticAMD/AuthenticAMD0A10F81_K19_StormPeak_01_CPUID.txt#L81C17-L81C25|title=CPUID dump for 96-Core AMD Ryzen Threadripper PRO 7995WX (Storm Peak) Zen4|date=October 19, 2023}}</ref>

Support for the extension was submitted as a set of patches to the [[Linux kernel]] on 8 December 2016.<ref name="phoronix">{{Cite web|url=https://www.phoronix.com/scan.php?page=news_item&px=Intel-5-Level-Paging|title=Intel Working On 5-Level Paging To Increase Linux Virtual/Physical Address Space - Phoronix|author=Michael Larabel|date=9 December 2016|website=[[Phoronix]]|language=en|access-date=2018-04-26}}</ref> As was reported on the [[Linux kernel mailing list]], it consisted of extending the Linux memory model to use five levels rather than four.<ref>{{Cite mailing list|url=http://lkml.iu.edu/hypermail/linux/kernel/1612.1/00383.html|title=[RFC, PATCHv1 00/28] 5-level paging|last=Shutemov|first=Kirill A.|mailing-list=[[Linux kernel mailing list]]|date=December 8, 2016|access-date=2018-04-26}}</ref> This is because, although Linux [[Abstraction (software engineering)|abstracts]] the details of the page tables, it still depends on having a number of levels in its own representation. When an [[Instruction set architecture|architecture]] supports fewer levels, Linux emulates extra levels that do nothing.<ref>{{Cite web|url=https://www.kernel.org/doc/gorman/html/understand/understand006.html|title=Page Table Management|website=www.kernel.org|access-date=2018-04-26}}</ref> A similar change was previously made to extend from three levels to four.<ref>{{Cite web|url=https://lwn.net/Articles/106177/|title=Four-level page tables [LWN.net]|date=October 12, 2004|website=lwn.net|access-date=2018-04-26}}</ref>