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Guy Harris (talk | contribs) Avoid redirect. No need to link programmable interrupt controller twice (that page isn't about the 8259, it's about interrupt controllers in general - Intel 8259 is the page about the 8259). Remove items linked in the body from "See also". |
Citation bot (talk | contribs) Added date. | Use this bot. Report bugs. | Suggested by Abductive | Category:Interrupts | #UCB_Category 3/35 |
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All Intel processors starting with the P5 microarchitecture ([[P54C]]) have a built-in local APIC.<ref name="Mueller2011">{{cite book|author=Scott M. Mueller|title=Upgrading and Repairing PCs|year=2011|publisher=Que Publishing|isbn=978-0-13-268218-3|page=242|edition=20th}}</ref><ref name="timer" /> However, if the local APIC is disabled in a P5 processor, it cannot be re-enabled by software; this limitation no longer exists in the [[P6 (microarchitecture)|P6 processors]] and later ones.<ref name="timer" />
The [[Message Signaled Interrupts]] (MSI) feature of the PCI 2.2 and later specifications cannot be used without the local APIC being enabled.<ref name="up">{{cite web|url=http://msdn.microsoft.com/en-us/windows/hardware/gg462964.aspx|title=Windows Hardware Dev Center|website=msdn.microsoft.com|date=June 2017 }}</ref> Use of MSI obviates the need for an I/O APIC. Additionally, up to 224 interrupts are supported in MSI mode, and IRQ sharing is not allowed.<ref name="msi"/>
=== APIC timer ===
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