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=== Integration ===
In 2012 the coarse-grained architectural approach was taken a step further by combining the [[logic block]]s and interconnects of traditional FPGAs with embedded [[microprocessor]]s and related peripherals to form a complete [[System on a chip|system on a programmable chip]]. Examples of such hybrid technologies can be found in the [[Xilinx]] Zynq-7000 all [[Programmable system-on-chip|Programmable SoC]],<ref name="Xilinx-Inc-Oct-2011-8-K">{{cite web|url=http://edgar.secdatabase.com/520/95012311090713/filing-main.htm |title=Xilinx Inc, Form 8-K, Current Report, Filing Date Oct 19, 2011 |publisher=secdatabase.com |access-date =May 6, 2018}}</ref> which includes a 1.0 [[Gigahertz|GHz]] dual-core [[ARM Cortex-A9]] MPCore processor [[Embedded system|embedded]] within the FPGA's logic fabric,<ref name="Xilinx-Inc-May-2011-10-K">{{cite web|url=http://edgar.secdatabase.com/1249/95012311055454/filing-main.htm |title=Xilinx Inc, Form 10-K, Annual Report, Filing Date May 31, 2011 |publisher=secdatabase.com |access-date =May 6, 2018}}</ref> or in the [[Altera]] Arria V FPGA, which includes an 800 MHz [[Dual core|dual-core]] [[ARM Cortex-A9]] MPCore. The [[Atmel]] FPSLIC is another such device, which uses an [[Atmel AVR|AVR]] processor in combination with Atmel's programmable logic architecture. The [[Microsemi]] [[SmartFusion]] devices incorporate an ARM Cortex-M3 hard processor core (with up to 512 kB of [[Flash memory|flash]] and 64 kB of RAM) and analog [[peripheral]]s such as a multi-channel [[analog-to-digital converter]]s and [[digital-to-analog converter]]s to their [[flash memory]]-based FPGA fabric.{{cn|date=November 2022}}
=== Clocking ===
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