Multithreading (computer architecture): Difference between revisions

Revision as of 19:55, 7 April 2007

Revision as of 21:36, 7 April 2007

Line 94:

====Hardware Costs====

andIn controladdition registers.to the hardware costs discussed in the ''Block'' type Forof examplemultithreading, a''interleaved'' CPUmultithreading withhas 7an additional cost of each pipeline stagesstage needstracking tothe havethread itsID registerof hardwarethe instruction replicatedit 7is timesprocessing. Also, since there are more threads being executed concurrently in the pipeline, shared resources such as caches and TLBs need to larger to avoid thrashing between the different threads.

The additional hardware cost of this type multithreading is that ''each'' pipeline stage has to maintain its own register set

and control registers. For example, a CPU with 7 pipeline stages needs to have its register hardware replicated 7 times. Also, since there are more threads being executed concurrently in the pipeline, shared resources such as caches and TLBs need to larger to avoid thrashing between the different threads.

====Examples====