Memory segmentation: Difference between revisions

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The [[Intel 80286]] and later processors add "286 [[protected mode]]", which retains 16-bit addressing, and adds segmentation (without paging) and per-segment memory protection. For backward compatibility, all x86 CPUs start up in "real mode", with the same fixed overlapping 64 KiB segments, no memory protection, only 1 MiB physical address space, and some subtle differences ([[high memory area]], [[unreal mode]]). In order to use its full 24-bit (16 MiB) physical address space and advanced [[memory management unit|MMU]] features, an 80286 or later processor must be switched into "protected mode" by software, usually the operating system or a [[DOS extender]]. If a program does not use the segment registers, or only puts values into them that it receives from the operating system, then identical code can run in real mode or protected mode, but most real-mode software computes new values for the segment registers, breaking this compatibility.

The [[Intel i386]] and later processors add "386 [[protected mode]]", which uses 32-bit addressing, retains segmentation, and adds [[memory paging]]. In these processors, the segment table, rather than pointing to a page table for the segment, contains the segment address in ''linear memory''. When paging is enabled, addresses in linear memory are then mapped to physical addresses using a separate page table. Most operating systems did not use the segmentation capability, despite possible advantages (4 x 4GiB logical address space instead of only 4 GiB), opting to keep the base address in all segment registers equal to 0 at all times and provide per-page memory protection and swapping using only paging. Some use the CS register to provide [[executable space protection]] on processors lacking the [[NX bit]] or use the FS or GS registers to access thread-local storage.<ref name="pietrek-windows-nt">{{cite web |url=https://learn.microsoft.com/en-us/archive/msdn-magazine/2006/may/x64-starting-out-in-64-bit-windows-systems-with-visual-c |title=Everything You Need To Know To Start Programming 64-Bit Windows Systems |publisher=Microsoft |author=Matt Pietrek |author-link=Matt Pietrek |date=May 2006 |access-date=April 18, 2023}}</ref><ref name="drepper-linux-etc">{{cite web |url=http://www.akkadia.org/drepper/tls.pdf |title=ELF Handling For Thread-Local Storage |first=Ulrich |last=Drepper |date=August 22, 2013}}</ref>

The [[x86-64]] architecture does not support segmentation in "[[long mode]]" (64-bit mode).<ref name=":1">{{cite book |title=AMD64 Technology AMD64 Architecture Programmer's Manual Volume 2: System Programming |publisher=Advanced Micro Devices |volume=2 |date=2018 |url=https://www.amd.com/system/files/TechDocs/24594.pdf}}</ref> Four of the segment registers: CS, SS, DS, and ES are forced to 0, and the limit to 2⁶⁴. The segment registers FS and GS can still have a nonzero base address. This allows operating systems to use these segments for special purposes such as thread-local storage.<ref name="pietrek-windows-nt" /><ref name="drepper-linux-etc" />