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→Recent implementation models: Add more modern examples Tags: Mobile edit Mobile web edit |
→AMD EPYC 9684X (2023): Add M1 cache info Tags: Mobile edit Mobile web edit |
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* L2 cache - 1 {{abbr|MB|megabytes}} per core
* L3 cache - 1152 {{abbr|MB|megabytes}} shared
=== Apple M1 Ultra (2022) ===
20 core (4:1 "performance" core | "efficiency" core):
* L1 cache - 320|192 {{abbr|kB|kilobytes}} per core
* L2 cache - 52 {{abbr|MB|megabytes}} semi-shared
* L3 cache - 96 {{abbr|MB|megabytes}} shared
=== Intel Broadwell microarchitecture (2014) ===
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