Revision as of 00:54, 20 October 2023 edit Cedar101 (talk \| contribs) Extended confirmed users 18,557 edits m →Instruction list: rm indents ← Previous edit		Revision as of 18:48, 12 April 2024 edit undo 97.102.205.224 (talk) →Optional feature instructions: List alias instructions (e.g. CLR Rd is EOR Rd,Rd) in parens after the primary instruction, rather than on a separate line. This reduces the (still too tall) vertical height of this table. Next edit →
Line 449: ! scope=row \| Minimal AVR1 Core \| {{ublist\|AT90S1200\|ATtiny11\|ATtiny12\|ATtiny15\|ATtiny28}} \| {{ublist\|item_style=font-family:monospace;\|ADD (LSL)\|ADC (ROL)\|SUB \|SUBI\|SBC\|SBCI\|AND (TST)\|ANDI (CBR)\|OR\|ORI (SBR)\|EOR (CLR)\|COM\|NEG~~\|SBR\|CBR~~\|INC\|DEC~~\|TST\|CLR\|SER~~}} \| {{ublist\|item_style=font-family:monospace;\|RJMP\|RCALL\|RET\|RETI\|CPSE\|CP\|CPC\|CPI\|SBRC\|SBRS\|SBIC\|SBIS\|BRBS (BRCS,&ZeroWidthSpace;BRLO,&ZeroWidthSpace;BREQ,&ZeroWidthSpace;BRMI,&ZeroWidthSpace;BRVS,&ZeroWidthSpace;BRLT,&ZeroWidthSpace;BRHS,&ZeroWidthSpace;BRTS,&ZeroWidthSpace;BRIE)\|BRBC~~\|BREQ\|BRNE\|BRCS\|~~ (BRCC\|,&ZeroWidthSpace;BRSH~~\|BRLO\|BRMI\|~~,&ZeroWidthSpace;BRNE,&ZeroWidthSpace;BRPL\|,&ZeroWidthSpace;BRVC,&ZeroWidthSpace;BRGE~~\|BRLT\|BRHS\|~~,&ZeroWidthSpace;BRHC~~\|BRTS\|~~,&ZeroWidthSpace;BRTC~~\|BRVS\|BRVC\|BRIE\|~~,&ZeroWidthSpace;BRID)}} \| {{ublist\|item_style=font-family:monospace;\|LD\|ST\|MOV\|LDI (SER)\|IN\|OUT\|{{mono\|LPM}} (not in AT90S1200)\|item7_style=font-family:unset;}} \| {{ublist\|item_style=font-family:monospace;\|SBI\|CBI~~\|LSL~~\|LSR~~\|ROL~~\|ROR\|ASR\|SWAP\|BSET (SEC, SEZ, SEN, SEV, SES, SEH, SET, SEI)\|BCLR~~\|BST\|BLD\|SEC\|~~ (CLC~~\|SEN\|~~, CLZ, CLN~~\|SEZ\|CLZ\|SEI\|CLI\|SES\|~~, CLV, CLS~~\|SEV\|CLV\|SET\|~~, CLH, CLT, CLI)\|~~SEH~~BST\|~~CLH~~BLD\|NOP\|SLEEP\|WDR}} \|- style="vertical-align:top;" ! scope=row \| Classic Core up to 8K Program Space ("AVR2")

Atmel AVR instruction set: Difference between revisions