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Also of value is that MPUs are sufficiently general as processors (they can run standard [[Linux]] [[Symmetric multiprocessing|SMP]] or lightweight simple [[Execution (computers)|executives]]) so that one MPU based computer design can address a wide selection of the applications listed above using different software loads. This reduces the number of different module types that are needed in a product line addressing both control and packet processing network functions, reducing development costs and inventory volumes.
=== Software Architectures for these new MPUs ===
The efficient use of these MPUs requires a redesign of the packet processing dataplane. Of course, they can run a standard [[Linux]] [[Symmetric multicprocessing|SMP]], but it is not enough to scale properly for high speed packet processing. So, the architecture is usually based on running Linux on a subset of cores for the control plane and a lightweight code for the dataplane into the other cores. This architecture was first introduced by the 6WINDGate(tm) from [http://www.6wind.com 6WIND].
[[Category:Microprocessors]]
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