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{{Short description|CPU Instruction}}
In [[computer architecture]], the [[test-and-set]] CPU [[instruction (computer science)|instruction]] (or instruction sequence) is designed to implement
[[mutual exclusion]] in [[multiprocessor]] environments. Although a correct [[lock (computer science)|lock]] can be implemented with test-and-set, the ''test and test-and-set'' optimization lowers [[resource contention]] caused by bus locking, especially [[cache coherence | cache coherency protocol]] overhead on contended locks.
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