Field-programmable analog array: Difference between revisions

Revision as of 04:22, 18 March 2024

Revision as of 03:20, 12 May 2024

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== History ==

[[File:LYAPUNOV-1 circuit board.jpg|thumb|The LYAPUNOV-1 uses a 4x8 grid of FPAA chips.]]

The term ''FPAA'' was first used in 1991 by Lee and Gulak.<ref name="1 Lee and Gulak">{{cite journal |author=E. K. F. Lee |author2=P. G. Gulak |date=December 1991 |title=A CMOS Field-programmable analog array |journal=IEEE Journal of Solid-State Circuits |volume=26 |issue=12 |pages=1860–1867 |doi=10.1109/4.104162|bibcode=1991IJSSC..26.1860L |s2cid=5323561 }}</ref> They put forward the concept of CABs that are connected via a routing network and configured digitally. Subsequently, in 1992{{citation needed|date=July 2023}} and 1995<ref name="3 Lee and Gulak">{{cite book|chapter=A transconductor-based field-programmable analog array|doi=10.1109/ISSCC.1995.535521|isbn=0-7803-2495-1|year=1995|last1=Lee|first1=E.K.F.|last2=Gulak|first2=P.G.|title=Proceedings ISSCC '95 - International Solid-State Circuits Conference |pages=198–199|s2cid=56613166}}</ref> they further elaborated the concept with the inclusion of op-amps, capacitors, and resistors. This original chip was manufactured using 1.2&nbsp;µmμm CMOS technology and operates in the 20&nbsp;kHz range at a power consumption of 80&nbsp;mW.

Pierzchala et al introduced a similar concept named '''electronically-programmable analog circuit''' ('''EPAC''').<ref name="4 Pierzchala">{{cite book|chapter=Current-mode amplifier/Integrator for a field-programmable analog array|doi=10.1109/ISSCC.1995.535520|isbn=0-7803-2495-1|year=1995|last1=Pierzchala|first1=E.|last2=Perkowski|first2=M.A.|last3=Van Halen|first3=P.|last4=Schaumann|first4=R.|title=Proceedings ISSCC '95 - International Solid-State Circuits Conference |pages=196–197|s2cid=60724962}}</ref> It featured only a single integrator. However, they proposed a local interconnect [[Network architecture|architecture]] in order to try to avoid the bandwidth limitations.

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In 2004 Joachim Becker picked up the [[parallel connection]] of OTAs (operational transconductance amplifiers) and proposed its use in a hexagonal local interconnection architecture.<ref name="8 Becker">{{cite CiteSeerX |title=A continuous-time field programmable analog array (FPAA) consisting of digitally reconfigurable GM-cells |citeseerx = 10.1.1.444.8748}}{{clarify|reason= "title=" does not match title at citeseerx;|date=July 2023}}</ref> It did not require a routing network and eliminated switching the signal path that enhances the frequency response.

In 2005 Fabian Henrici worked with Joachim Becker to develop a switchable and invertible OTA which doubled the maximum FPAA bandwidth.<ref name="9 Becker">{{cite CiteSeerX |title=A Continuous-Time Hexagonal Field-Programmable Analog Array in 0.13 µmμm CMOS with 186MHz GBW|citeseerx = 10.1.1.444.8748}}{{clarify|reason= "title=" does not match title at citeseerx;|date=July 2023}}</ref> This collaboration resulted in the first manufactured FPAA in a [[130 nanometer|0.13&nbsp;µmμm]] [[CMOS]] technology.

In 2016 Dr. Jennifer Hasler from Georgia Tech designed a FPAA system on a chip that uses analog technology to achieve unprecedented power and size reductions.<ref name="11 Hasler">{{cite journal |date=June 2016 |author=Suma George |author2=Sihwan Kim |author3=Sahil Shah |author4=Jennifer Hasler |author5=Michelle Collins |author6=Farhan Adil |author7=Richard Wunderlich |author8=Stephen Nease |author9=Shubha Ramakrishnan |title=A Programmable and Configurable Mixed-Mode FPAA SoC |journal=IEEE Transactions on Very Large Scale Integration (VLSI) Systems |volume=24 |issue=6 |pages=2253–2261 |doi=10.1109/TVLSI.2015.2504119|s2cid=14027246}}</ref>