Intel Core (microarchitecture): Difference between revisions

Revision as of 06:41, 14 April 2024

Revision as of 00:46, 15 May 2024

Line 39:

| microarch = Core

| extensions = [[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], [[SSE4]], [[VT-x]] (some)

| sock1 = [[Socket M]] (µPGAμPGA 478)

| sock2 = [[Socket P]] (µPGAμPGA 478)

| sock3 = [[Socket T]] ([[LGA 775]])

| sock4 = [[Socket J]] ([[LGA 771]])

| sock5 = [[Socket 604]]

| sock6 = [[Micro-FCBGA|FCBGA]] (µBGAμBGA 479)

| sock7 = [[Micro-FCBGA|FCBGA]] (µBGAμBGA 965)

| predecessor = [[NetBurst]]<br/>[[Enhanced Pentium M (microarchitecture)|Enhanced Pentium M]] ([[P6 (microarchitecture)|P6]])

| successor = [[Penryn (microarchitecture)|Penryn (tick)]]<br/>(a version of Core)<br/>[[Nehalem (microarchitecture)|Nehalem (tock)]]

Line 304:

| [[List of Intel Celeron microprocessors#"Penryn-3M" (standard-voltage, 45 nm) 2|T3xxx]] || rowspan=2 | 2 || rowspan=2|1 MB || Socket P || 35 W

|-

| [[List of Intel Celeron microprocessors#"Penryn-3M" (ultra-low-voltage, 45 nm) 2|SU2xxx]] || µFCμFC-BGA 956 ||10 W

|-

| rowspan=2 | Penryn-L

| [[List of Intel Celeron microprocessors#"Penryn-3M" (standard-voltage, 45 nm)|9x0]] || rowspan=2 | 1 || rowspan=2|1 MB || Socket P || 35 W

|-

| [[List of Intel Celeron microprocessors#"Penryn-3M" (ultra-low-voltage, 45 nm)|7x3]] || µFCμFC-BGA 956|| 10 W

|-

| rowspan=2 | Penryn-3M

Line 315:

| [[List of Intel Pentium microprocessors#"Penryn-3M" (standard voltage, 45 nm)|T4xxx]]|| rowspan=2 | 2 || 1 MB || Socket P || 35 W

|-

| [[List of Intel Pentium microprocessors#"Penryn-3M" (ultra-low voltage, 45 nm)|SU4xxx]] || rowspan=2|2 MB || rowspan=2|µFCμFC-BGA 956|| 10 W

|-

| Penryn-L