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===Bit-banging the protocol===
The [[pseudocode]] below ajith outlines a software-implementation ("[[bit-banging]]") of SPI's protocol as a main with simultaneous output and input. This pseudocode is for CPHA=0 and CPOL=0, thus SCLK is pulled low before {{Overline|CS}} is activated and bits are inputted on SCLK's rising edge while bits are outputted on SCLK's falling edge.
* Initialize SCLK as low and {{Overline|CS}} as high
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