Serial Peripheral Interface: Difference between revisions

Revision as of 03:37, 1 June 2024

Revision as of 10:06, 25 June 2024

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| {{center|{{Overline|CS}}}} || {{center|Chip Select}} || [[Logic level#Active state|Active-low]] [[Chip select|chip select signal]] from main (master) to<br/>enable communication with a specific sub (slave) device.

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| {{center|SCLK}} || {{center|Serial Clock}} || [[Clock signal]] from main (master) transitions for each serial data bit.

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| {{center|MOSI}} || {{center|Main Out, Sub In<br/>(master out, slave in)}} || [[Serial communication|Serial data]] from main (master), highestmost-significant bit first.

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| {{center|MISO}} || {{center|Main In, Sub Out<br/>(master in, slave out)}} || [[Serial communication|Serial data]] from sub (slave), highestmost-significant bit first.

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