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{{Use American English|date=July 2024}}
{{Redirect|Caching|3=Cache (disambiguation)}}
[[File:cache,basic.svg|thumb|upright=1|Diagram of a CPU memory cache operation]]
In [[computing]], a '''cache''' ({{IPAc-en|audio=LL-Q1860 (eng)-Back ache-cache.wav|k|æ|ʃ}} {{respell|KASH}})<ref>
{{cite web|url=http://www.oxforddictionaries.com/definition/english/cache|archive-url=https://web.archive.org/web/20120818122040/http://oxforddictionaries.com/definition/english/cache|url-status=dead|archive-date=18 August 2012|title=Cache|work=Oxford Dictionaries|access-date=2 August 2016}}</ref> is a hardware or software component that stores data so that future requests for that data can be served faster; the data stored in a cache might be the result of an earlier computation or a copy of data stored elsewhere. A '''cache hit''' occurs when the requested data can be found in a cache, while a '''cache miss''' occurs when it cannot. Cache hits are served by reading data from the cache, which is faster than recomputing a result or reading from a slower data store; thus, the more requests that can be served from the cache, the faster the system performs.<ref>{{Cite journal|last1=Zhong|first1=Liang|last2=Zheng|first2=Xueqian|last3=Liu|first3=Yong|last4=Wang|first4=Mengting|last5=Cao|first5=Yang|date=February 2020|title=Cache hit ratio maximization in device-to-device communications overlaying cellular networks|url=http://dx.doi.org/10.23919/jcc.2020.02.018|journal=China Communications|volume=17|issue=2|pages=232–238|doi=10.23919/jcc.2020.02.018|s2cid=212649328|issn=1673-5447}}</ref>
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Earlier [[graphics processing unit]]s (GPUs) often had limited read-only [[texture cache]]s and used [[Swizzling (computer graphics)]] to improve 2D [[locality of reference]]. [[Cache miss]]es would drastically affect performance, e.g. if [[mipmapping]] was not used. Caching was important to leverage 32-bit (and wider) transfers for texture data that was often as little as 4 bits per pixel.
As GPUs advanced, supporting [[general-purpose computing on graphics processing units]] and [[compute kernel]]s, they have developed progressively larger and increasingly general caches, including [[instruction cache]]s for [[shader]]s, exhibiting functionality commonly found in CPU caches. These caches have grown to handle [[synchronization primitive]]s between threads and [[atomic operation]]s, and interface with a CPU-style MMU.
===DSPs===
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==In-network cache==
===Information-centric networking===
[[Information-centric networking]] (ICN) is an approach to evolve the [[Internet]] infrastructure away from a host-centric paradigm, based on perpetual connectivity and the [[end-to-end principle]], to a network architecture in which the focal point is identified information
Unlike proxy servers, in ICN the cache is a network-level solution. Therefore, it has rapidly changing cache states and higher request arrival rates; moreover, smaller cache sizes
====Policies====
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