Nonvolatile BIOS memory: Difference between revisions

Revision as of 17:09, 26 August 2024

Revision as of 17:10, 26 August 2024

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'''Nonvolatile BIOS memory''' refers to a small [[Memory (computers)|memory]] on [[personal computer|PC]] [[motherboard]]s that is used to store [[BIOS]] settings. It is traditionally called '''CMOS''' RAM because it uses a [[volatile memory|volatile]], low-power [[CMOS|complementary metal–oxide–semiconductor (CMOS)]] [[Static random access memory|SRAM]] (such as the [[Motorola]] MC146818<ref>https://books.google.com.pa/books?id=E1p2FDL7P5QC&pg=PA393&dq=bios+cmos&hl=en&newbks=1&newbks_redir=0&source=gb_mobile_search&ovdme=1&sa=X&ved=2ahUKEwiukryekpOIAxWwaDABHRSrDl8Q6AF6BAgNEAM#v=onepage&q=bios%20cmos&f=false</ref> or similar) powered by a small "CMOS" battery when system and standby power is off.<ref name=whatiscmos>{{cite web |url=http://pcsupport.about.com/od/termsc/g/cmos.htm |title=What is CMOS? (CMOS & CMOS Battery Definition) |publisher=[[About.com]] |first=Tim |last=Fisher |access-date=2 September 2015 |archive-date=9 August 2016 |archive-url=https://web.archive.org/web/20160809082556/http://pcsupport.about.com/od/termsc/g/cmos.htm |url-status=dead }}</ref> It is referred to as non-volatile memory or [[Non-volatile random-access memory|NVRAM]] because, after the system loses power, it does retain state by virtue of the CMOS battery. When the battery fails, BIOS settings are reset to their defaults. The battery can also be used to power a real time clock (RTC). The name CMOS memory comes from the first PCs whose only CMOS chip was the one used for storing BIOS settings.<ref>https://books.google.com.pa/books?id=69648Y1sOewC&printsec=frontcover&dq=bios+cmos&hl=en&newbks=1&newbks_redir=0&source=gb_mobile_search&ovdme=1&sa=X&redir_esc=y#v=onepage&q=bios%20cmos&f=false</ref>

The CMOS RAM and the real-time clock have been integrated as a part of the [[Southbridge (computing)|southbridge]] chipset and they may not be standalone chips on modern motherboards.<ref name="100Series">{{cite web|url=http://www.intel.com/content/www/us/en/chipsets/100-series-chipset-datasheet-vol-1.html |title=Intel 100 Series Chipset Family PCH Datasheet| publisher=Intel |date=August 2015 |access-date=16 April 2016}}</ref><ref>{{cite web|url=https://www.intel.com/Assets/PDF/datasheet/290562.pdf|title=82430FX PCISET Data Sheet|publisher=Intel|access-date=23 January 2023}}</ref> In turn, the southbridge has been integrated into a single [[Platform Controller Hub]]. Alternatively BIOS settings may be stored in the computer's [[Super I/O]] chip.<ref>https://books.google.com.pa/books?id=E1p2FDL7P5QC&pg=PA393&dq=bios+cmos&hl=en&newbks=1&newbks_redir=0&source=gb_mobile_search&ovdme=1&sa=X&ved=2ahUKEwiukryekpOIAxWwaDABHRSrDl8Q6AF6BAgNEAM#v=onepage&q=bios%20cmos&f=false</ref>

The chipset built-in NVRAM capacity is typically 256 [[byte]]s.<ref name="100Series" /> For this reason, later BIOS implementations may use a small portion of BIOS flash ROM as NVRAM, to store setup data.<ref>http://rom.by/files/AMIBIOS8-Flash-Recovery-Whitepaper.pdf {{Bare URL PDF|date=August 2024}}</ref>