Speedcoding: Difference between revisions

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==Syntax and Semantics==
Speedcoding programs are organized as a series of instructions, each of which are stored in memory as a single 72-bit data word. An instruction generally consists of two operations (OP<sub>1</sub> and OP<sub>2</sub>) and 4 memory addresses. The first operation (OP<sub>1</sub>) is a mathematical or input/output operation that has 3 associated memory addresses, one or more of which can be modified depending on the nature of the operation. Mathematical operations include basic arithmetic, square root, and trigonometry functions. The logical operations include functionality for reading, writing, skipping, and rewinding [[magnetic-tape data storage|magnetic tape]], as well as operations for interacting with data stored in [[drum memory]]. The second operation (OP<sub>2</sub>) is a logical operation that has the remaining 1 associated memory address. Logical operations allow instructions to be carried out in a different order from which they are written allowing for implementations of gotos, conditionals, loops, and other advanced behavior.<ref name="ibm-speedcoding-system-1954"/>
 
Reserved Arithmetic and Input/Output Operation Keywords<ref name="ibm-speedcoding-system-1954"/>