Depletion-load NMOS logic: Difference between revisions

Revision as of 12:21, 8 September 2024

Revision as of 19:24, 16 September 2024

Line 23:

There are a couple of drawbacks associated with PMOS: The [[electron hole]]s that are the charge (current) carriers in PMOS transistors have lower mobility than the [[electron]]s that are the charge carriers in NMOS transistors (a ratio of approximately 2.5), furthermore PMOS circuits do not interface easily with low voltage positive logic such as [[Diode–transistor logic|DTL-logic]] and [[Transistor–transistor logic|TTL-logic]] (the 7400-series). However, PMOS transistors are relatively easy to make and were therefore developed first — ionic contamination of the gate oxide from [[Etching (microfabrication)|etching chemical]]s and other sources can very easily prevent (the [[electron]] based) NMOS transistors from switching off, while the effect in (the [[electron-hole]] based) PMOS transistors is much less severe. Fabrication of NMOS transistors therefore has to be many times cleaner than bipolar processing in order to produce working devices.

Early work on NMOS integrated circuit (IC) technology was presented in a brief [[IBM]] paper at [[ISSCC]] in 1969. [[Hewlett-Packard]] then started to develop NMOS IC technology to get the promising speed and easy interfacing for its calculator business.<ref>These calculators (like the [[Datapoint 2200]] and others) were in many ways small [[desktop computer]]s, but preceded the [[Apple II series|Apple II]] and the [[IBM Personal Computer|IBM PC]] by many years.</ref> Tom Haswell at HP eventually solved many problems by using purer raw materials (especially aluminum for interconnects) and by adding a bias voltage to make the [[threshold voltage|gate threshold]] large enough; this ''back-gate bias'' remained a ''de facto'' standard solution to (mainly) [[sodium]] contaminants in the gates until the development of [[ion implantation]] (see below). Already by 1970, HP was making good enough nMOS ICs and had characterized it enough so that Dave Maitland was able to write an article about nMOS in the December, 1970 issue of Electronics magazine. However, NMOS remained uncommon in the rest of the semiconductor industry until 1973.<ref>''Shown by its mere mention in a large roundup article written by GE engineer Herman Schmid that appeared in the December, 1972 issue of IEEE Transactions on Manufacturing Technology. Although it cites Maitland’s 1970 article in Electronics, Schmid’s article does not discuss NMOS fabrication in detail but it does cover PMOS and even CMOS fabrication extensively.''</ref>

The production-ready NMOS process enabled HP to develop the industry’s first 4-kbit IC [[Read-only memory|ROM]]. [[Motorola]] eventually served as a second source for these products and so became one of the first commercial semiconductor vendors to master the NMOS process, thanks to Hewlett-Packard. A while later, the startup company [[Intel]] announced a 1-kbit pMOS DRAM, called ''1102'', developed as a custom product for [[Honeywell]] (an attempt to replace magnetic [[core memory]] in their [[mainframe computer]]s). HP’s calculator engineers, who wanted a similar but more robust product for the [[HP 9800 series|9800 series]] calculators, contributed IC fabrication experience from their 4-kbit ROM project to help improve Intel DRAM’s reliability, operating-voltage, and temperature range. These efforts contributed to the heavily enhanced [[Intel 1103]] 1-kbit pMOS DRAM, which was the world’s first commercially available [[Dynamic random-access memory|DRAM]] IC. It was formally introduced in October 1970, and became Intel’s first really successful product.<ref>{{cite web|url=http://www.hp9825.com/html/prologues.html |title=Prologues |publisher=Hp9825.com |date= |accessdate=2022-03-15}}</ref>