Memory hierarchy: Difference between revisions

Revision as of 06:01, 3 July 2024

Revision as of 14:20, 20 September 2024

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{{Memory types}}

In [[computer organisationarchitecture]], the '''memory hierarchy''' separates [[computer storage]] into a hierarchy based on [[Response time (technology)|response time]]. Since response time, [[Computational complexity|complexity]], and [[Computer data storage|capacity]] are related, the levels may also be distinguished by their [[Computer performance|performance]] and controlling technologies.<ref name="toyzee" /> Memory hierarchy affects performance in computer architectural design, algorithm predictions, and lower level [[computer programming|programming]] constructs involving [[locality of reference]].

Designing for high performance requires considering the restrictions of the memory hierarchy, i.e. the size and capabilities of each component. Each of the various components can be viewed as part of a hierarchy of memories {{math|(''m''₁, ''m''₂, ..., ''m_n'')}} in which each member {{mvar|m_i}} is typically smaller and faster than the next highest member {{math|''m''_''i''+1}} of the hierarchy. To limit waiting by higher levels, a lower level will respond by filling a buffer and then signaling for activating the transfer.