Serial Peripheral Interface: Difference between revisions

Revision as of 14:24, 27 September 2024

Revision as of 14:46, 27 September 2024

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==Operation==

[[File:SPI basic operation, single Main & Sub.svg|thumb|368x368px|Figure 1: Common SPI connectivity with a single sub.]]

''<small>(Note: [[#Variations|Variations]] section describes operation of non-standard variants.)</small>''

Commonly, SPI has four [[logic signal]]s. [[#Variations|Variations]] may use different [[#Alternative terminology|names]] or have different signals. Historical terms are shown in parentheses.

[[File:SPI basic operation, single Main & Sub.svg|thumb|368x368px|Figure 1: Basic SPI configuration using a single main and a single sub. Each device internally uses a [[shift register]] for serial communication, which together forms an inter-chip [[circular buffer]].]]

SPI has four [[Logic signal|logic signals]] (which may have [[#Alternative terminology|alternative names]]):

:{| class="wikitable"

! Short<br />Name Abbr.!! Long<br />Name !! Description<br />(historical terms in parens)

|-

| {{center|{{Overline|CS}}}} || {{center|Chipchip Selectselect}} || [[Logic level#Active state|Active-low]] [[Chip select|chip select signal]] signal from main (master) to<br />enable communication with a specific sub (slave) device.

|-

| {{center|SCLK}} || {{center|Serialserial Clockclock}} || [[Clock signal]] from main (master).

|-

| {{center|MOSI}} || {{center|Main Outmain{{nbsp}}out, Sub In{{nbsp}}sub{{nbsp}}in<br />{{small|(master {{nbsp}}out, {{nbsp}}slave {{nbsp}}in)}}}} || [[Serial communication|Serial data]] from main (master), [[most-significant bit]] first.

|-

| {{center|MISO}} || {{center|Main Inmain{{nbsp}}in, Sub Out{{nbsp}}sub{{nbsp}}out<br />{{small|(master {{nbsp}}in, {{nbsp}}slave {{nbsp}}out)}}}} || [[Serial communication|Serial data]] from sub (slave), most-significant bit first.

|}

MOSI on a main outputs to MOSI on a sub. MISO on a sub outputs to MISO on a main.

[[File:SPI basic operation, single Main & Sub.svg|thumb|368x368px|Figure 1: Basic SPI configuration using a single main and a single sub. Each device internally uses a [[shift register]] for serial communication, which together forms an inter-chip [[circular buffer]].]]

SPI operates with a single device acting as main and with one or more sub devices.

Sub devices should use [[tri-state output]]s so their MISO signal becomes [[high impedance]] (''electrically disconnected'') when the device is not selected. Subs without tri-state outputs cannot share a MISO wire with other subs without using an external tri-state buffer.

===Data transmission===