Pulse transition detector: Difference between revisions

Revision as of 05:55, 23 September 2021

Revision as of 22:01, 4 October 2024

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{{Unreferenced|date=December 2009}}

A '''Pulsepulse transition detector''' is used in [[Flip-flop (electronics)|flip flops]] in order to achieve [[signal edge|edge]] triggering in the [[Electronic circuit|circuit]]. It merely converts the [[clock signal]]'s rising edge to a very narrow pulse.

The PTD consists of a delay gate (which delays the clock signal) and the clock signal itself passed through a [[NAND gate]] and then inverted.

The benefit of edge triggering is that it removes the problems of zeroes and ones catching associated with pulse triggered flipflopsflip-flops (e.g. [[Flip-flop_(electronics)#Master–slave edge-triggered D flip-flop|master slave flip flops]]).

{{DEFAULTSORT:Pulse Transition Detector}}