Content deleted Content added
→Further reading: removed section -- not relevant to generic opcodes and covered in detail in machine_code |
→CPUs: simplified and clarified |
||
Line 5:
==CPUs==
In CPUs, an opcode may be referred to as '''instruction machine code'''<ref name="Intel_1973_MCS-4"/>, '''instruction code'''<ref name="Intel_1974_MCS-40"/>, '''instruction syllable'''<ref name="Jones_1988_CISC"/><ref name="Domagała_2012"/><ref name="Smotherman_2013"/><ref name="Jones_2016_CISC"/>, '''instruction parcel''' or '''opstring'''<ref name="Schulman_2005"/><ref name="Chiba_2007"/>. Beside the opcode itself, most instructions also specify the data they will process, which are called [[operand]]s.
Specifications and format of the opcodes are laid out in the ISA of the processor in question, which may be a general CPU or a more specialized processing unit.<ref name="Hennessy_2017"/> Opcodes for a given instruction set can be described through the use of an [[opcode table]] detailing all possible opcodes. There are instruction sets with nearly uniform fields for opcode and operand specifiers, as well as others (the [[x86]] architecture for instance) with a more complicated, variable-length structure.<ref name="Hennessy_2017"/><ref name="Mansfield_1983"/> Instruction sets can be extended through the use of opcode prefixes which add a subset of new instructions made up of existing opcodes following reserved byte sequences.{{Citation needed|date=February 2023}}
| |||