Random-access memory: Difference between revisions

Revision as of 19:32, 3 November 2024

Revision as of 19:33, 3 November 2024

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A second type, DRAM, is based around a capacitor. Charging and discharging this capacitor can store a "1" or a "0" in the cell. However, the charge in this capacitor slowly leaks away, and must be refreshed periodically. Because of this refresh process, DRAM uses more power, but it can achieve greater storage densities and lower unit costs compared to SRAM.

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|[[File:SRAM Cell (6 Transistors).svg|thumb|SRAM Cellcell (6 Transistorstransistors)]]||[[File:DRAM Cell Structure (Model of Single Circuit Cell).PNG|thumb|DRAM Cellcell (1 Transistortransistor and one capacitor)]]

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