Field-programmable gate array: Difference between revisions

Revision as of 05:41, 1 December 2024

Revision as of 05:43, 1 December 2024

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=== Soft core ===

[[File:Xilinx Zynq-7000 AP SoC.jpg|thumb|A [[Xilinx]] Zynq-7000 Allall-programmable Programmable Systemsystem on a Chipchip]]

An alternate approach to using hard macro processors is to make use of [[soft processor]] [[Semiconductor intellectual property core|IP cores]] that are implemented within the FPGA logic. [[Nios II]], [[MicroBlaze]] and [[Mico32]] are examples of popular softcore processors. Many modern FPGAs are programmed at ''run time'', which has led to the idea of [[reconfigurable computing]] or reconfigurable systems – [[CPU]]s that reconfigure themselves to suit the task at hand. Additionally, new non-FPGA architectures are beginning to emerge. Software-configurable microprocessors such as the Stretch S5000 adopt a hybrid approach by providing an array of processor cores and FPGA-like programmable cores on the same chip.