Field-programmable gate array: Difference between revisions

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The evolution of FPGAs has motivated an increase in the use of these devices, whose architecture allows the development of hardware solutions optimized for complex tasks, such as 3D MRI image segmentation, 3D discrete wavelet transform, tomographic image reconstruction, or PET/MRI systems.<ref>{{Cite journal |last1=Alcaín |first1=Eduardo |last2=Fernández |first2=Pedro R. |last3=Nieto |first3=Rubén |last4=Montemayor |first4=Antonio S. |last5=Vilas |first5=Jaime |last6=Galiana-Bordera |first6=Adrian |last7=Martinez-Girones |first7=Pedro Miguel |last8=Prieto-de-la-Lastra |first8=Carmen |last9=Rodriguez-Vila |first9=Borja |last10=Bonet |first10=Marina |last11=Rodriguez-Sanchez |first11=Cristina |date=2021-12-15 |title=Hardware Architectures for Real-Time Medical Imaging |journal=Electronics |language=en |volume=10 |issue=24 |pages=3118 |doi=10.3390/electronics10243118 |issn=2079-9292|doi-access=free }}</ref><ref>{{Cite journal |last1=Nagornov |first1=Nikolay N. |last2=Lyakhov |first2=Pavel A. |last3=Valueva |first3=Maria V. |last4=Bergerman |first4=Maxim V. |date=2022 |title=RNS-Based FPGA Accelerators for High-Quality 3D Medical Image Wavelet Processing Using Scaled Filter Coefficients |journal=IEEE Access |volume=10 |pages=19215–19231 |doi=10.1109/ACCESS.2022.3151361 |s2cid=246895876 |issn=2169-3536|doi-access=free |bibcode=2022IEEEA..1019215N }}</ref> The developed solutions can perform intensive computation tasks with parallel processing, are dynamically reprogrammable, and have a low cost, all while meeting the hard real-time requirements associated with medical imaging.

Another trend in the use of FPGAs is [[hardware acceleration]], where one can use the FPGA to accelerate certain parts of an algorithm and share part of the computation between the FPGA and a general-purpose processor. The search engine [[Bing (search engine)|Bing]] is noted for adopting FPGA acceleration for its search algorithm in 2014.<ref name="BingFPGA">{{cite news |last1=Morgan |first1=Timothy Pricket |title=How Microsoft Is Using FPGAs To Speed Up Bing Search |url=https://www.enterprisetech.com/2014/09/03/microsoft-using-fpgas-speed-bing-search/ |access-date=2018-09-18 |publisher=Enterprise Tech |date=2014-09-03}}</ref> {{as of|2018}}, FPGAs are seeing increased use as [[AI accelerator]]s including Microsoft's Project Catapult<ref name="ProjCatapult">{{cite web|url=https://www.microsoft.com/en-us/research/project/project-catapult/|title=Project Catapult|date=July 2018|website=Microsoft Research}}</ref> and for accelerating [[artificial neural network]]s<ref>{{Cite journal |last=Zoltán-Valentin |first=Gyulai-Nagy |date=2023-01-01 |title=Acceleration of Neural Network training algorithms via FPGA devices |url=https://linkinghub.elsevier.com/retrieve/pii/S1877050923014175 |journal=Procedia Computer Science |series=27th International Conference on Knowledge Based and Intelligent Information and Engineering Sytems (KES 2023) |volume=225 |pages=2674–2683 |doi=10.1016/j.procs.2023.10.259 |issn=1877-0509}}</ref> for [[machine learning]] applications.<!--[[User:Kvng/RTH]]-->

Traditionally,{{When|date=October 2018}} FPGAs have been reserved for specific [[vertical application]]s where the volume of production is small. For these low-volume applications, the premium that companies pay in hardware cost per unit for a programmable chip is more affordable than the development resources spent on creating an ASIC. {{As of|2017}}, new cost and performance dynamics have broadened the range of viable applications.