26-bit computing: Difference between revisions

Revision as of 15:58, 24 October 2022

Revision as of 00:36, 15 December 2024

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=== Early ARM processors ===

In the [[ARM_architecture|ARM processor architecture]], 26-bit refers to the design used in the original ARM processors where the [[Programprogram Countercounter]] ('''PC''') and [[Status_registerStatus register|Processor Status Register]] ('''PSR''') were combined into one 32-bit [[Processor_registers|register]] (R15), the status flags filling the high 6 bits and the Program Counter taking up the lower 26 bits.

In fact, because the program counter is always word-aligned the lowest two bits are always zero which allowed the designers to reuse these two bits to hold the processor's mode bits too. The four modes allowed were USR26, SVC26, IRQ26, FIQ26; contrast this with the 32 possible modes available when the program status was separated from the program counter in more recent [[ARM architecture]]s.