Partial-response maximum-likelihood: Difference between revisions

Revision as of 04:36, 31 July 2024

Revision as of 01:23, 31 December 2024

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The first implementation of PRML was shipped in 1984 in the Ampex Digital Cassette Recording System (DCRS). The chief engineer on DCRS was [[Charles Coleman (engineer)|Charles Coleman]]. The machine evolved from a 6-head, transverse-scan, digital [[video tape recorder]]. DCRS was a cassette-based, digital, instrumentation recorder capable of extended play times at very high data-rate.<ref>T. Wood, "[http://www.thic.org/pdf/Oct96/ampex.twood.pdf Ampex Digital Cassette Recording System (DCRS)]", THIC meeting, Ellicott City, MD, 16 Oct., 1996 (PDF)</ref> It became Ampex' most successful digital product.<ref>R. Wood, K. Hallamasek, "[https://www.computerhistory.org/collections/catalog/102788145 Overview of the prototype of the first commercial PRML channel]", Computer History Museum, #102788145, Mar. 26, 2009</ref>

The heads and the read/write channel ran at the (then) remarkably high data-rate of 117&nbsp;MbitsMbit/s.<ref>C. Coleman, D. Lindholm, D. Petersen, and R. Wood, "[https://web.archive.org/web/20191007051735/https://ieeexplore.ieee.org/document/5261308 High Data Rate Magnetic Recording in a Single Channel]", J. IERE, Vol., 55, No. 6, pp. 229-236, June 1985. (invited) (Charles Babbage Award for Best Paper)</ref> The PRML electronics were implemented with four 4-bit, [[Plessey]] [[analog-to-digital converter]]s (A/D) and [https://en.wikichip.org/wiki/fairchild/100k 100k ECL logic].<ref>Computer History Museum, #102741157, "[https://www.computerhistory.org/collections/catalog/102741157 Ampex PRML Prototype Circuit]", circa 1982</ref> The PRML channel outperformed a competing implementation based on "Null-Zone Detection".<ref>J. Smith, "[https://ieeexplore.ieee.org/document/1089924 Error Control in Duobinary Data Systems by Means of Null Zone Detection]", IEEE Trans. Comm., Vil 16, No. 6, pp. 825-830, Dec., 1968</ref> A prototype PRML channel was implemented earlier at 20&nbsp;Mbit/s on a prototype 8-inch HDD,<ref name=8inch>R. Wood, S. Ahlgrim, K. Hallamasek, R. Stenerson, "[https://ieeexplore.ieee.org/document/1063460 An Experimental Eight-inch Disc Drive with One-hundred Megabytes Per Surface]", IEEE Trans. Mag., vol. MAG-20, No. 5, pp. 698-702, Sept. 1984. (invited)</ref> but Ampex exited the HDD business in 1985. These implementations and their mode of operation are best described in a paper by Wood and Petersen.<ref>R. Wood and D. Petersen, "[https://ieeexplore.ieee.org/document/1096563 Viterbi Detection of Class IV Partial Response on a Magnetic Recording Channel]", IEEE Trans. Comm., Vol., COM-34, No. 5, pp. 454-461, May 1986 (invited)</ref> Petersen was granted a patent on the PRML channel but it was never leveraged by Ampex.<ref>D. Petersen, "[https://patents.google.com/patent/US4504872A/en Digital maximum likelihood detector for class IV partial response]", US Patent 4504872, filed Feb. 8, 1983</ref>

=== Hard disk drives ===

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The PRML channel for the IBM 0681 was developed in [[IBM Rochester]] lab. in Minnesota<ref>J. Coker, R. Galbraith, G. Kerwin, J. Rae, P. Ziperovich, "[https://ieeexplore.ieee.org/document/278677 Implementation of PRML in a rigid disk drive]", IEEE Trans. Magn., Vol. 27, No. 6, pp. 4538-43, Nov. 1991</ref> with support from the [[IBM Zurich]] Research lab. in [[Switzerland]].<ref>R.Cidecyan, F.Dolvio, R. Hermann, W.Hirt, W. Schott "[https://ieeexplore.ieee.org/document/124468 A PRML System for Digital Magnetic Recording]", IEEE Journal on Selected Areas in Comms, vol.10, No.1, pp.38-56, Jan 1992</ref> A parallel R&D effort at IBM San Jose did not lead directly to a product.<ref>T. Howell, et al. "[https://ieeexplore.ieee.org/document/104703 Error Rate Performance of Experimental Gigabit per Square Inch Recording Components]", IEEE Trans. Magn., Vol. 26, No. 5, pp. 2298-2302, 1990</ref> A competing technology at the time was 17ML<ref>A. Patel, "[https://www.researchgate.net/publication/224663211 Performance Data for a Six-Sample Look-Ahead 17ML Detection Channel]", IEEE Trans. Magn., Vol. 29, No. 6, pp. 4012-4014, Dec. 1993</ref> an example of Finite-Depth Tree-Search (FDTS).<ref>R. Carley, J. Moon, "[https://patents.google.com/patent/US5136593A/en Apparatus and method for fixed delay tree search]", filed Oct. 30th, 1989</ref><ref>R. Wood, "[https://ieeexplore.ieee.org/document/42527 New Detector for 1,k Codes Equalized to Class II Partial Response]", IEEE Trans. Magn., Vol. MAG-25, No. 5, pp. 4075-4077, Sept. 1989</ref>

The IBM 0681 read/write channel ran at a data-rate of 24&nbsp;MbitsMbit/s but was more highly integrated with the entire channel contained in a single 68-pin [[Plastic leaded chip carrier|PLCC]] [[integrated circuit]] operating off a 5 volt supply. As well as the fixed analog equalizer, the channel boasted a simple adaptive digital ''cosine equalizer''<ref>T. Kameyama, S. Takanami, R. Arai, "[https://ieeexplore.ieee.org/document/1059216 Improvement of recording density by means of cosine equalizer]", IEEE Trans. Magn., Vol. 12, No. 6, pp. 746-748, Nov. 1976</ref> after the A/D to compensate for changes in radius and/or changes in the magnetic components.

=== Write precompensation ===