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}}</ref> It was followed by the development of MOS SRAM by John Schmidt at Fairchild in 1964.<ref name="computerhistory1970"/> SRAM became an alternative to magnetic-core memory, but required six MOS transistors for each [[bit]] of data.<ref name="ibm100">{{cite web |title=DRAM |url=https://www.ibm.com/ibm/history/ibm100/us/en/icons/dram/ |website=IBM100 |publisher=[[IBM]] |access-date=20 September 2019 |date=9 August 2017}}</ref> Commercial use of SRAM began in 1965, when [[IBM]] introduced the SP95 memory chip for the [[IBM System/360|System/360 Model 95]].<ref name="computerhistory1966"/>
[[Dynamic random-access memory]] (DRAM) allowed replacement of a 4 or 6-transistor latch circuit by a single transistor for each memory bit, greatly increasing memory density at the cost of volatility. Data was stored in the tiny capacitance of each transistor and had to be periodically [[Memory refresh|refreshed]] every few milliseconds before the charge could leak away.
[[Toshiba]]'s Toscal BC-1411 [[electronic calculator]], which was introduced in 1965,<ref>[http://collection.sciencemuseum.org.uk/objects/co8406093/toscal-bc-1411-calculator-with-electronic-calculator Toscal BC-1411 calculator]. {{webarchive|url=https://web.archive.org/web/20170729145228/http://collection.sciencemuseum.org.uk/objects/co8406093/toscal-bc-1411-calculator-with-electronic-calculator |date=2017-07-29 }}, [[Science Museum, London]].</ref><ref name="bc-spec" /><ref name="bc" /> used a form of capacitor
[[File:Bundesarchiv Bild 183-1989-0406-022, VEB Carl Zeiss Jena, 1-Megabit-Chip.jpg|thumb|right|CMOS 1-[[megabit]] (Mbit) DRAM chip, one of the last models developed by [[VEB Carl Zeiss Jena]], in 1989]]
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