IBM System/360 architecture: Difference between revisions

Revision as of 17:47, 22 January 2025

Revision as of 18:17, 22 January 2025

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| align=center valign=top | 0-7

| valign=top style="align:left;" | {{anchor|System_Mask}}System Mask

| valign=top | bits 0-5: enable channels 0-5, bit 6: enable all remaining channels,{{#tag:ref|On a processor that complies with the S/360 architecture, the highest channel number is 6. Eleven bits are sufficient to identify the cuu, and seven bits are sufficient to provide masking of I/O interruptions. However, on a 360/67-2 with two 2846 channel controllers, channels are numbered 0-6 and 8-14;<ref name=GA27-2719/>{{rp|page=15}} similarly, the 360/195 had an extended channel feature<ref name=A22-6943/>{{rp|page=21}} but numbered the channels 0 through 13.<ref name=A22-6943/>{{rp|page=25}} I/O interruptions for Channel Controller 1 on the 360/67-2 were masked using control registers, and the 360/195 used bit 7 (Channel 6) of the System Mask as a summary mask bit for channels 6 and up. ''Interruptions from More than Seven Channels''^{[[#PoOps{{sfn|PoOps]]}}}{{rp|page=121.4}} describes the summary masking for additional channels, but other text in Principles of Operation still refers to a limit of 7 channels. Standard software supported channels 0-F.|group=NB|name=ChanNum}} bit 7: enable External interruptions (timer, interrupt key, and external signal)<sup class=reference>[[#Pops{{sfn|PoOps]]</sup>}}{{rp|page=71}}

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| align=center valign=top | 8-11

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| align=center valign=top | 16-31

| valign=top | {{anchor|Interruption_Code}}Interruption Code

| code to indicate the type of interruption, inserted when the PSW is stored, during IPLoad, this is the address of the device from which the program was loaded<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>}}{{rp|page=77}}

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| align=center valign=top | 32-33

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| align=center valign=top | 36-39

| valign=top | {{anchor|Program_Mask}}Program Mask

| bit 36: enable fixed-point overflow, bit 37: decimal overflow, bit 38: exponent underflow, bit 39: significance<sup class=reference>[[#PoOps{{sfn|PoOps]]</sup>}}{{rp|page=71}}

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| align=center valign=top|40-63