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Guy Harris (talk | contribs) →CHERI Implementations: Use a citation template, add URL, title, and publisher. |
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* '''Morello''': Developed by Arm as part of the UKRI-funded Digital Security by Design (DSbD) programme,<ref>{{cite web |url=https://www.arm.com/architecture/cpu/morello |title=Arm Morello Program |access-date=9 January 2025}}</ref><ref>{{cite web |last1=Robinson |first1=Dan |title=How Arm popped CHERI architecture into Morello Program hardware |url=https://www.theregister.com/2022/08/26/arm_cheri_morello/ |publisher=The Register |access-date=11 January 2025}}</ref> the Morello chip is a superset architecture designed to evaluate experimental CHERI features for potential production use on the AArch64 architecture. The Morello board supports CheriBSD, custom versions of Android, and Linux. It remains a research prototype.
* '''CHERIoT''':<ref name="cheriot" /> Introduced by Microsoft in 2023<ref>{{cite tech report |author1=Saar Amar
* '''Sonata''':<ref>{{cite web |url=https://www.sunburst-project.org | title=Welcome to the Sunburst Project | publisher=lowRISC | access-date=20 January 2025}}</ref> Developed by lowRISC and manufactured by NewAE as part of the UKRI-funded Sunburst project, the Sonata platform is an FPGA-based system designed to run RISC-V architectures. The board has an open-source design, allowing researchers and developers to modify and adapt its hardware and software. Sonata is primarily designed as a prototyping system for CHERIoT.
* '''ICENI''': Announced by SCI Semiconductors in 2024,<ref name="iceni" /> ICENI is a CHERIoT-compatible microcontroller designed for secure embedded systems.
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