Floating point operations per second: Difference between revisions

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| 8 || 16 || 0
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|{{plainlistublist|
*| Intel [[Haswell (microarchitecture)|Haswell]]<ref name="tpeak_jos"/> ([[Haswell (microarchitecture)|Haswell]], [[Haswell (microarchitecture)|Devil's Canyon]], [[Broadwell (microarchitecture)|Broadwell]])
*| Intel [[Skylake (microarchitecture)|Skylake]] <br/>([[Skylake (microarchitecture)|Skylake]], [[Kaby Lake]], [[Coffee Lake]], [[Comet Lake (microprocessor)|Comet Lake]], [[Whiskey Lake (microarchitecture)|Whiskey Lake]], [[Amber Lake (microarchitecture)|Amber Lake]])
}}
|[[Advanced Vector Extensions|AVX2]] & [[FMA instruction set|FMA]] (256-bit)
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* Intel [[Ice Lake (microprocessor)|Ice Lake]], [[Tiger Lake (microprocessor)|Tiger Lake]] and [[Rocket Lake]]
}}
| [[Advanced Vector Extensions|AVX-512]] & [[FMA instruction set|FMA]] (512-bit)
| 32 || 64 || 0
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! colspan="5" |AMD CPU
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*AMD [[Jaguar (microarchitecture)|Jaguar]]
*AMD [[Puma (microarchitecture)|Puma]]
}}
|[[Advanced Vector Extensions|AVX]] (128-bit)
}} || 4 || 8 || 0
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|AMD [[AMD 10h|K10]]
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|{{plainlistublist|
*|AMD [[Zen (microarchitecture)|Zen]] <br/>(Ryzen 1000 series, Threadripper 1000 series, Epyc [[Epyc|Naples]])
*|AMD [[Zen+]]<ref name="tpeak_jos"/><ref>{{Cite web | url=http://www.agner.org/optimize/blog/read.php?i=838 | title=Agner's CPU blog - Test results for AMD Ryzen}}</ref><ref>https://arstechnica.com/gadgets/2017/03/amds-moment-of-zen-finally-an-architecture-that-can-compete/2/ "each core now has a pair of 128-bit FMA units of its own"</ref><ref>{{cite conference |url=https://www.hotchips.org/wp-content/uploads/hc_archives/hc28/HC28.23-Tuesday-Epub/HC28.23.90-High-Perform-Epub/HC28.23.930-X86-core-MikeClark-AMD-final_v2-28.pdf#page=7 |title=A New x86 Core Architecture for the Next Generation of Computing |author=Mike Clark |date=August 23, 2016 |publisher=AMD |conference=HotChips 28 |access-date=October 8, 2017 |archive-date=July 31, 2020 |archive-url=https://web.archive.org/web/20200731171730/https://www.hotchips.org/wp-content/uploads/hc_archives/hc28/HC28.23-Tuesday-Epub/HC28.23.90-High-Perform-Epub/HC28.23.930-X86-core-MikeClark-AMD-final_v2-28.pdf#page=7 |url-status=dead }} [https://images.anandtech.com/doci/10591/HC28.AMD.Mike%20Clark.final-page-007.jpg page 7]</ref> <br/>(Ryzen 2000 series, Threadripper 2000 series)
}}
| [[Advanced Vector Extensions|AVX2]] & [[FMA instruction set|FMA]] <br/>(128-bit, 256-bit decoding)<ref>{{Cite web |title=The microarchitecture of Intel and AMD CPUs |url=https://www.agner.org/optimize/microarchitecture.pdf}}</ref>
| 8 || 16 || 0
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|{{plainlistublist|
*|AMD [[Zen 2]]<ref name="www.youtube.com">{{cite web |url=https://www.youtube.com/watch?v=_96stDCb-mk&t=3299 |title=AMD CEO Lisa Su's COMPUTEX 2019 Keynote |archive-url=https://ghostarchive.org/varchive/youtube/20211211/_96stDCb-mk| archive-date=2021-12-11 |url-status=live |website=youtube.com|date=May 27, 2019 }}{{cbignore}}</ref> <br/>(Ryzen 3000 series, Threadripper 3000 series, Epyc [[Epyc|Rome]]))
*|AMD [[Zen 3]] <br/>(Ryzen 5000 series, Epyc [[Epyc|Milan]])
}}
| [[Advanced Vector Extensions|AVX2]] & [[FMA instruction set|FMA]] (256-bit)
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|-
| Nvidia [[Kepler (microarchitecture)|Kepler]]
(GeForce GTX Titan and Titan Black, Quadro K6000, Tesla (except K10))
| [[Parallel Thread Execution|PTX]]
| {{2/3}} || 2 || 0
|-
|{{plainlistublist|
*| Nvidia [[Maxwell (microarchitecture)|Maxwell]]
*| Nvidia [[Pascal (microarchitecture)|Pascal]] <br/>(all except Quadro GP100 and Tesla P100)
}}
| [[Parallel Thread Execution|PTX]] || {{frac|1|16}} || 2 || {{frac|1|32}}
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|[[TeraScale (microarchitecture)#TeraScale 3|TeraScale 3]] || 1 || 4 || {{dunno}}
|-
| AMD [[Graphics Core Next|GCN]]<br/>(only Radeon Pro W 8100–9100)
(only Radeon Pro W 8100–9100)
| [[Graphics Core Next|GCN]] || 1 || 2 || {{dunno}}
|-
| AMD [[Graphics Core Next|GCN]]<br/>(all except Radeon Pro W 8100–9100, Vega 10–20)
(all except Radeon Pro W 8100–9100, Vega 10–20)
| [[Graphics Core Next|GCN]] || {{frac|1|8}} || 2 || 4
|-
| AMD [[AMD RX Vega series|GCN Vega 10]] || [[Graphics Core Next|GCN]] || {{frac|1|8}} || 2 || 4
|-
| AMD [[AMD RX Vega series|GCN Vega 20]] <br/>(only Radeon VII) || [[Graphics Core Next|GCN]]
| {{1/2}}<br/>(locked by driver,<br/>1 in hardware) || 2 || 4
|-
| AMD [[AMD RX Vega series|GCN Vega 20]]<br/>(only Radeon Instinct MI50 / MI60 and Radeon Pro VII)
(only Radeon Instinct MI50 / MI60 and Radeon Pro VII)
| [[Graphics Core Next|GCN]]
| 1 || 2 || 4