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[[5G NR]] uses [[Polar code (coding theory)|polar code]] for the control channels and LDPC for the data channels.<ref>{{cite web|url=https://accelercomm.com/sites/accelercomm.com/files/5G-Channel-Coding_0.pdf|title=5G Channel Coding|access-date=January 6, 2019|archive-url=https://web.archive.org/web/20181206003124/https://www.accelercomm.com/sites/accelercomm.com/files/5G-Channel-Coding_0.pdf|archive-date=December 6, 2018|url-status=dead}}</ref><ref>{{cite web|url=https://accelercomm.com/sites/accelercomm.com/files/5G-Channel-Coding_0.pdf|title=A Vision for 5G Channel Coding|last=Maunder|first=Robert|date=September 2016|access-date=January 6, 2019|archive-url=https://web.archive.org/web/20181206003124/https://www.accelercomm.com/sites/accelercomm.com/files/5G-Channel-Coding_0.pdf|archive-date=December 6, 2018|url-status=dead}}</ref>
Although LDPC code has had its success in commercial hard disk drives, to fully exploit its error correction capability in [[SSD]]s demands unconventional fine-grained flash memory sensing, leading to an increased memory read latency. LDPC-in-SSD<ref>{{Cite conference |author= Kai Zhao |author2=Wenzhe Zhao |author3=Hongbin Sun |author4=Tong Zhang |author5=Xiaodong Zhang |author6=Nanning Zheng | title=LDPC-in-SSD: Making Advanced Error Correction Codes Work Effectively in Solid State Drives |conference= FAST' 13| pages=243–256|year=2013|url=https://www.usenix.org/system/files/conference/fast13/fast13-final125.pdf}}</ref> is an effective approach to deploy LDPC in SSD with a very small latency increase, which turns LDPC in SSD into a reality. Since then, LDPC has been widely adopted in commercial SSDs in both customer-grades and enterprise-grades by major storage
==Operational use==
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