Pass transistor logic: Difference between revisions

Revision as of 01:34, 28 December 2024

Latest revision as of 10:26, 10 June 2025

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=={{anchor|CPL}}Complementary pass transistor logic==

Some authors use the term "''complementary pass transistor logic"'' to indicate a style of implementing logic gates that uses [[transmission gate]]s composed of both NMOS and PMOS pass transistors.<ref>

{{cite book |first=Gary K. |last=Yeap |title=Practical Low Power Digital VLSI Design |publisher=Springer |orig-year=1998 |date=2012 |isbn=978-1-4615-6065-4 |pages=197 |url=https://books.google.com/books?id=sXTdBwAAQBAJ}}

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Other authors use the term "''complementary pass transistor logic"'' (CPL) to indicate a style of implementing logic gates where each gate consists of a NMOS-only pass transistor network, followed by a CMOS output inverter.<ref>

{{cite book |first=Vojin G. |last=Oklobdzija |title=Digital Design and Fabrication |publisher= CRC Press|date= 19 December 2017|isbn= 9780849386046|pages=2–39 |url=https://books.google.com/books?id=VOnyWUUUj04C}}

</ref><ref name="IEEE_1990"/><ref name="ULVD_2015"/>

OtherYet other authors use the term "''complementary pass transistor logic"'' (CPL) to indicate a style of implementing logic gates using dual-rail encoding. Every CPL gate has two output wires, both the positive signal and the complementary signal, eliminating the need for inverters.<ref>

{{cite book |editor-first=Wai-Kai |editor-last=Chen |title=Logic Design |publisher=CRC Press |___location= |date=2003 |isbn=978-0-203-01015-0 |pages=15–7 |url=https://books.google.com/books?id=X0a3BgAAQBAJ |oclc=1029500642}}

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''Complementary pass transistor logic'' or "Differential''differential pass transistor logic" refers'' to a [[logic families|logic family]] which is designed for certain advantage. It is common to use this logic family for [[Multiplexer#Digital multiplexers|multiplexers]] and [[Latch (electronics)|latches]].{{citation needed|date=April 2015}}

CPL uses series transistors to select between possible inverted output values of the logic, the output of which drives an [[Inverter (logic gate)|inverter]] . The CMOS [[transmission gate]]s consist of nMOS and pMOS transistor connected in parallel.

==Other forms==