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The design of instruction sets is a complex issue. There were two stages in history for the microprocessor. The first was the CISC (complex instruction set computer), which had many different instructions. In the 1970s, however, places like IBM did research and found that many instructions in the set could be eliminated. The result was the RISC (reduced instruction set computer), an architecture that uses a smaller set of instructions. A simpler instruction set may offer the potential for higher speeds, reduced processor size, and reduced power consumption. However, a more complex set may optimize common operations, improve memory and [[CPU cache|cache]] efficiency, or simplify programming.
Some instruction set designers reserve one or more opcodes for some kind of [[system call]] or [[software interrupt]]. For example, [[MOS Technology 6502]] uses 00<sub>H</sub>, [[Zilog Z80]] uses the eight codes C7,CF,D7,DF,E7,EF,F7,FF<sub>H</sub><ref>{{cite web|last=Ganssle|first=Jack|url=https://www.embedded.com/electronics-blogs/break-points/4023293/Proactive-Debugging|title=Proactive Debugging|date=February 26, 2001|website=embedded.com}}</ref> while [[Motorola 68000]] use codes in the range
Fast virtual machines are much easier to implement if an instruction set meets the [[Popek and Goldberg virtualization requirements]].{{Clarify|date=October 2012}}
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