|
== Variable SMP ==
{{POV section|talk=Undue weight on vSMP|date=August 2017}}
Variable Symmetric Multiprocessing (vSMP) is a specific mobile use case technology initiated by NVIDIA. This technology includes an extra fifth core in a quad-core device, called the Companion core, built specifically for executing tasks at a lower frequency during mobile active standby mode, video playback, and music playback.
Project Kal-El ([[Tegra 3]]),<ref name="AutoMQ-4" /> patented by NVIDIA, was the first SoC (System on Chip) to implement this new vSMP technology. This technology not only reduces mobile power consumption during active standby state, but also maximizes quad core performance during active usage for intensive mobile applications. Overall this technology addresses the need for increase in battery life performance during active and standby usage by reducing the power consumption in mobile processors.
Unlike current SMP architectures, the vSMP Companion core is OS transparent meaning that the operating system and the running applications are totally unaware of this extra core but are still able to take advantage of it. Some of the advantages of the vSMP architecture includes cache coherency, OS efficiency, and power optimization. The advantages for this architecture are explained below:
*Cache coherency: There are no consequences for synchronizing caches between cores running at different frequencies since vSMP does not allow the companion core and the main cores to run simultaneously.
*OS efficiency: It is inefficient when multiple CPU cores are run at different asynchronous frequencies because this could lead to possible scheduling issues.{{How|date=August 2017}} With vSMP, the active CPU cores will run at similar frequencies to optimize OS scheduling.
*Power optimization: In asynchronous clocking based architecture, each core is on a different power plane to handle voltage adjustments for different operating frequencies. The result of this could impact performance.{{How|date=August 2017}} vSMP technology is able to dynamically enable and disable certain cores for active and standby usage, reducing overall power consumption.
These advantages lead the vSMP architecture to considerably benefit{{Peacock term|date=August 2017}} over other architectures using asynchronous clocking technologies.
== See also ==
| 