MIPS architecture processors: Difference between revisions

Revision as of 21:38, 2 November 2024

Revision as of 19:23, 1 July 2025

Line 89:

=== MIPS-based supercomputers ===

One interesting, less common use of the MIPS architecture is in massive processor count supercomputers. [[Silicon Graphics]] (SGI) refocused its business from desktop graphics workstations to the [[high-performance computing]] market in the early 1990s. The success of the company's first foray into server systems, the [[SGI Challenge|Challenge]] series based on the R4400 and [[R8000]], and later [[R10000]], motivated SGI to form a vastly more powerful system. The introduction of the integrated R10000 allowed SGI to produce a system, the [[Origin 2000]], eventually scalable to 1024 CPUs using its [[NUMAlink]] cc-NUMA interconnect. The Origin 2000 begat the [[Origin 3000]] series which topped out with the same 1,024 maximum CPU count but using the R14000 and R16000 chips up to 700 MHz. Its MIPS-based supercomputers were withdrawn in 2005 when SGI made the strategic decision to move to Intel's Itanium [[IA-64]] architecture.

A high-performance computing startup named [[SiCortex]] introduced a massively parallel MIPS-based supercomputer in 2007. The machines are based on the MIPS64 architecture and a high performance interconnect using a [[Kautz graph]] topology. The system is very power efficient and computationally powerful.{{citation needed|date=May 2013}} The most innovative aspect of the system was its multicore processing node which integrates six MIPS64 cores, a [[crossbar switch]] [[memory controller]], interconnect [[direct memory access]] (DMA) engine, [[Gigabit Ethernet]] and [[PCI Express]] controllers all on a single chip which consumes only 10 watts of power, yet has a peak floating point performance of 6 giga[[FLOPS]]. The most powerful configuration, the SC5832, is a single cabinet supercomputer consisting of 972 such node chips for a total of 5832 MIPS64 processor cores and 8.2 teraFLOPS of peak performance.