Multi-level cell: Difference between revisions

Revision as of 12:41, 21 June 2025

Revision as of 18:19, 4 July 2025

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{{short description|Memory cell capable of storing more than a single bit of information}}

{{Contradicts other|Memory cell (computing)|date=June 2025}}

[[File:Cell types SLC-PLC in comparison 20211102.svg|350px|thumb|right|alt=SLC, MLC, TLC, QLC, PLC shown with all possible bit combinations per cell type|The differences of the memory cells in comparison]]

In [[electronics]], a '''multi-level cell''' ('''MLC''') is a [[memory cell (computing)|memory cell]] capable of storing more than a single [[bit]] of information{{Contradictory inline|here|Memory cell (computing)|date=June 2025}}, compared to a '''single-level cell''' ('''SLC'''), which can store only one bit per memory cell. A memory cell typically consists of a single [[floating-gate MOSFET]] (metal–oxide–semiconductor field-effect transistor), thus multi-level cells reduce the number of MOSFETs required to store the same amount of data as single-level cells.

'''Triple-level cells''' ('''TLC''') and '''quad-level cells''' ('''QLC''') are versions of MLC memory, which can store three and four bits per cell respectively. The name "''multi''-level cell" is sometimes used specifically to refer to the "''two''-level cell". Overall, the memories are named as follows: