Systolic array: Difference between revisions

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{{Short description|Type of parallel computing architecture of tightly coupled nodes}}

{{Use dmy dates|date=October 2019}}

In [[parallel computing|parallel]] [[computer architectures]], a '''systolic array''' is a homogeneous [[Graph (discrete mathematics)|network]] of tightly coupled [[data processing unit]]s (DPUs) called cells or [[Node (computer science)|node]]s. Each node or DPU independently computes a partial result as a function of the data received from its upstream neighbours, stores the result within itself and passes it downstream. Systolic arrays were first used in [[Colossus computer|Colossus]], which was an early computer used to break German [[Lorenz cipher|Lorenz]] ciphers during [[World War II]].<ref>{{YouTube |id=g2tMcMQqSbA |title=Colossus - The Greatest Secret in the History of Computing |time=41m45s}}</ref> Due to the classified nature of Colossus, they were independently invented or rediscovered by [[H. T. Kung]] and [[Charles Leiserson]] who described arrays for many dense linear algebra computations (matrix product, solving systems of [[linear equation]]s, [[LU decomposition]], etc.) for banded matrices. Early applications include computing [[greatest common divisor]]s of integers and polynomials.<ref>{{Cite web | url=http://www.eecs.harvard.edu/~htk/publication/1984-ieeetoc-brent-kung.pdf | title=Systolic VLSI Arrays for Polynomial GCD Computation | first1=Richard P. | last=Brent | first2=H.T. | last2=Kung | website=www.eecs.harvard.edu | date=August 1984}}</ref> Nowdays, they can be found in [[NPUNeural processing unit|NPUs]]s and [[hardware accelerator]]s based on [[spatial architecture|spatial designs]]. They are sometimes classified as [[Multiple instruction, single data|multiple-instruction single-data]] (MISD) architectures under [[Flynn's taxonomy]], but this classification is questionable because a strong argument can be made to distinguish systolic arrays from any of Flynn's four categories: [[Single instruction, single data|SISD]], [[Single instruction, multiple data|SIMD]], [[Multiple instruction, single data|MISD]], [[Multiple instruction, multiple data|MIMD]], as discussed later in this article.

The parallel input [[data]] flows through a network of hard-wired [[Microprocessor|processor]] nodes, which combine, process, [[merge algorithm|merge]] or [[sorting algorithm|sort]] the input data into a derived result. Because the [[wave]]-like propagation of data through a systolic array resembles the [[pulse]] of the human circulatory system, the name ''systolic'' was coined from medical terminology. The name is derived from [[systole]] as an analogy to the regular pumping of blood by the heart.